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AD7304BRUZ PDF预览

AD7304BRUZ

更新时间: 2024-01-09 03:39:21
品牌 Logo 应用领域
亚德诺 - ADI /
页数 文件大小 规格书
14页 931K
描述
+3V/+5V, Rail-to-Rail Quad, 8-Bit DAC Serial-IN

AD7304BRUZ 技术参数

是否无铅: 含铅是否Rohs认证: 符合
生命周期:Active零件包装代码:SOIC
包装说明:SOP, SOP16,.4针数:16
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:1.59
最大模拟输出电压:5 V最小模拟输出电压:-5 V
转换器类型:D/A CONVERTER输入位码:BINARY
输入格式:SERIALJESD-30 代码:R-PDSO-G16
JESD-609代码:e3长度:10.3 mm
最大线性误差 (EL):0.3906%湿度敏感等级:1
标称负供电电压:-5 V位数:8
功能数量:1端子数量:16
最高工作温度:125 °C最低工作温度:-40 °C
封装主体材料:PLASTIC/EPOXY封装代码:SOP
封装等效代码:SOP16,.4封装形状:RECTANGULAR
封装形式:SMALL OUTLINE峰值回流温度(摄氏度):260
电源:3/5 V认证状态:Not Qualified
座面最大高度:2.65 mm最大稳定时间:2 µs
标称安定时间 (tstl):1 µs子类别:Other Converters
最大压摆率:6 mA标称供电电压:5 V
表面贴装:YES技术:CMOS
温度等级:AUTOMOTIVE端子面层:Matte Tin (Sn)
端子形式:GULL WING端子节距:1.27 mm
端子位置:DUAL处于峰值回流温度下的最长时间:30
宽度:7.5 mmBase Number Matches:1

AD7304BRUZ 数据手册

 浏览型号AD7304BRUZ的Datasheet PDF文件第2页浏览型号AD7304BRUZ的Datasheet PDF文件第3页浏览型号AD7304BRUZ的Datasheet PDF文件第4页浏览型号AD7304BRUZ的Datasheet PDF文件第5页浏览型号AD7304BRUZ的Datasheet PDF文件第6页浏览型号AD7304BRUZ的Datasheet PDF文件第7页 
+3 V/+5 V, Rail-to-Rail  
Quad, 8-Bit DAC  
a
AD7304/AD7305*  
FEATURES  
FUNCTIONAL BLOCK DIAGRAMS  
Four 8-Bit DACs in One Package  
+3 V, +5 V and 5 V Operation  
Rail-to-Rail REF-Input to Voltage Output Swing  
2.6 MHz Reference Multiplying Bandwidth  
Compact 1.1 mm Height TSSOP 16-/20-Lead Package  
Internal Power ON Reset  
SPI Serial Interface Compatible—AD7304  
Fast Parallel Interface—AD7305  
40 A Power Shutdown  
V
B V A  
V
REF REF  
DD  
8
8
8
8
8
8
8
8
PWR ON  
RESET  
INPUT  
REG A  
DAC A  
REG  
DAC A  
DAC B  
DAC C  
DAC D  
V
V
A
B
OUT  
OUT  
8
INPUT  
REG B  
DAC B  
REG  
CS  
SDI/SHDN  
CLK  
INPUT  
REG C  
DAC C  
REG  
V
V
C
D
OUT  
OUT  
SERIAL  
REG  
INPUT  
REG D  
DAC D  
REG  
APPLICATIONS  
Automotive Output Span Voltage  
Instrumentation, Digitally Controlled Calibration  
Pin-Compatible AD7226 Replacement when VDD < 5.5 V  
AD7304  
V
C V D  
REF  
V
GND  
CLR LDAC  
SS  
REF  
V
V
REF  
DD  
8
8
8
8
8
GENERAL DESCRIPTION  
PWR ON  
RESET  
INPUT  
REG A  
DAC A  
DAC A  
DAC B  
DAC C  
DAC D  
V
V
A
B
REG  
OUT  
OUT  
The AD7304/AD7305 are quad, 8-bit DACs that operate from a  
single +3 V to +5 V supply or 5 V supplies. The AD7304 has a  
serial interface, while the AD7305 has a parallel interface. Inter-  
nal precision buffers swing rail-to-rail. The reference input range  
includes both supply rails allowing for positive or negative full-  
scale output voltages. Operation is guaranteed over the supply  
voltage range of +2.7 V to +5.5 V, consuming less than 9 mW  
from a +3 V supply.  
DB0  
DB1  
DB2  
DB3  
DB4  
DB5  
DB6  
8
INPUT  
REG B  
DAC B  
REG  
8
8
DAC C  
REG  
INPUT  
REG C  
V
C
D
OUT  
8
INPUT  
REG D  
DAC D  
REG  
V
OUT  
WR  
A0/SHDN  
A1  
DECODE  
AD7305  
The full-scale voltage output is determined by the external refer-  
ence input voltage applied. The rail-to-rail VREF input to DAC  
V
LDAC  
GND  
SS  
V
V
OUT allows for a full-scale voltage set equal the positive supply  
DD, the negative supply VSS or any value in between.  
An internal power ON reset places both parts in the zero-scale  
state at turn ON. A 40 µA power shutdown (SHDN) feature is  
activated on both parts by tristating the SDI/SHDN pin on the  
AD7304, and tristating the A0/SHDN address pin on the  
AD7305.  
The AD7304’s doubled-buffered serial-data interface offers high  
speed, three-wire, SPI and microcontroller compatible inputs  
using data in (SDI), clock (CLK) and chip select (CS) pins.  
Additionally, an internal power-on reset sets the output to zero  
scale.  
The AD7304/AD7305 are specified over the extended industrial  
(–40°C to +85°C), and the automotive (–40°C to +125°C)  
temperature ranges. AD7304s are available in 16-lead plastic  
DIP (N-16), and wide-body SOL-16 (R-16) packages. The  
parallel input AD7305 is available in the 20-lead plastic DIP  
(N-20), and the SOL-20 (R-20) surface mount package. For  
ultracompact applications the thin 1.1 mm TSSOP-16 (RU-16)  
package will be available for the AD7304, while the TSSOP-20  
(RU-20) will house the AD7305.  
The parallel input AD7305 uses a standard address decode  
along with the WR control line to load data into the input regis-  
ters. The double buffered architecture allows all four input  
registers to be preloaded with new values, followed by a LDAC  
control strobe which copies all the new data into the DAC regis-  
ters thereby updating the analog output values. When operating  
from less than +5.5 V, the AD7305 is pin-compatible with the  
popular industry standard AD7226.  
*Protected under Patent Number 5684481.  
REV. A  
Information furnished by Analog Devices is believed to be accurate and  
reliable. However, no responsibility is assumed by Analog Devices for its  
use, nor for any infringements of patents or other rights of third parties  
which may result from its use. No license is granted by implication or  
otherwise under any patent or patent rights of Analog Devices.  
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.  
Tel: 781/329-4700  
Fax: 781/326-8703  
World Wide Web Site: http://www.analog.com  
© Analog Devices, Inc., 1998  

AD7304BRUZ 替代型号

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AD7304BRZ-REEL ADI

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