Datasheet > AD7195BCPZ-RL7

AD7195BCPZ-RL7

更新时间： 2024-11-04 06:36:11

品牌	Logo	应用领域
亚德诺 - ADI		/
页数	文件大小	规格书
44页	641K
描述
4.8 kHz, Ultralow Noise, 24-Bit Sigma-Delta ADC with PGA and AC Excitation

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AD7195BCPZ-RL7 数据手册

4.8 kHz, Ultralow Noise, 24-Bit

Sigma-Delta ADC with PGA and AC Excitation

AD7195

Chromatography

FEATURES

PLC/DCS analog input modules

Data acquisition

Medical and scientific instrumentation

AC or DC sensor excitation

RMS noise: 8.5 nV at 4.7 Hz (gain = 128)

16 noise-free bits at 2.4 kHz (gain = 128)

Up to 22.5 noise-free bits (gain = 1)

Offset drift: 5 nV/°C

Gain drift: 1 ppm/°C

Specified drift over time

2 differential/4 pseudo differential input channels

Automatic channel sequencer

Programmable gain (1 to 128)

Output data rate: 4.7 Hz to 4.8 kHz

Internal or external clock

GENERAL DESCRIPTION

The AD7195 is a low noise, complete analog front end for high

precision measurement applications. It contains a low noise,

24-bit sigma-delta (Σ-Δ) analog-to-digital converter (ADC).

The on-chip low noise gain stage means that signals of small

amplitude can be interfaced directly to the ADC. The AD7195

contains ac excitation, which is used to remove dc-induced

offsets from bridge sensors.

The device can be configured to have two differential inputs or

four pseudo differential inputs. The on-chip channel sequencer

allows several channels to be enabled, and the AD7195 sequentially

converts on each enabled channel. This simplifies communication

with the part. The on-chip 4.92 MHz clock can be used as the

clock source to the ADC or, alternatively, an external clock or

crystal can be used. The output data rate from the part can be

varied from 4.7 Hz to 4.8 kHz.

Simultaneous 50 Hz/60 Hz rejection

Power supply

AV_DD: 4.75 V to 5.25 V

DV_DD: 2.7 V to 5.25 V

Current: 6 mA

Temperature range: –40°C to +105°C

Package: 32-lead LFCSP

INTERFACE

The device has two digital filter options. The choice of filter

affects the rms noise/noise-free resolution at the programmed

output data rate, the settling time, and the 50 Hz/60 Hz rejec-

tion. For applications that require all conversions to be settled,

the AD7195 includes a zero latency feature.

3-wire serial

SPI, QSPI™, MICROWIRE™, and DSP compatible

Schmitt trigger on SCLK

APPLICATIONS

Weigh scales

The part operates with a 5 V analog power supply and a digital

power supply from 2.7 V to 5.25 V. It consumes a current of

6 mA. It is housed in a 32-lead LFCSP package.

Strain gage transducers

Pressure measurement

Temperature measurement

FUNCTIONAL BLOCK DIAGRAM

DD DGND

DD AGND

REFIN(+) REFIN(–)

REFERENCE

DETECT

AIN1

AIN2

AIN3

AIN4

DOUT/RDY

SERIAL

INTERFACE

MUX

DIN

Σ-Δ

ADC

PGA

AND

AINCOM

CONTROL

LOGIC

SCLK

SYNC

BPDSW

AGND

TEMP

SENSOR

CLOCK

CIRCUITRY

EXCITATION

CLOCK

AD7195

ACX1

ACX2

ACX2 MCLK1 MCLK2

Figure 1.

Rev. 0

Information furnished by Analog Devices is believed to be accurate and reliable. However, no

responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other

rights of third parties that may result from its use. Specifications subject to change without notice. No

license is granted by implication or otherwise under any patent or patent rights of Analog Devices.

Trademarks and registeredtrademarks arethe property of their respective owners.

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.

Tel: 781.329.4700

Fax: 781.461.3113

www.analog.com

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AD7195BCPZ-RL7 替代型号

型号	品牌	替代类型	描述	数据表
AD7195BCPZ-RL	ADI	完全替代	4.8 kHz, Ultralow Noise, 24-Bit Sigma-Delta ADC with PGA and AC Excitation
AD7195BCPZ	ADI	类似代替	4.8 kHz, Ultralow Noise, 24-Bit Sigma-Delta ADC with PGA and AC Excitation

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