Datasheet > AD7124-4BRUZ-RL

AD7124-4BRUZ-RL

更新时间： 2024-11-27 01:05:55

品牌	Logo	应用领域
亚德诺 - ADI		/
页数	文件大小	规格书
90页	1764K
描述
4-Channel, Low Noise, Low Power, 24-Bit, Sigma-Delta ADC with PGA and Reference

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替代型号

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AD7124-4BRUZ-RL 数据手册

4-Channel, Low Noise, Low Power, 24-Bit,

Sigma-Delta ADC with PGA and Reference

AD7124-4

Data Sheet

Low-side power switch

General-purpose outputs

Multiple filter options

FEATURES

3 power modes

RMS noise

Internal temperature sensor

Self and system calibration

Sensor burnout detection

Automatic channel sequencer

Per channel configuration

Low power: 24 nV rms at 1.17 SPS, gain = 128 (255 µA typical)

Mid power: 20 nV rms at 2.34 SPS, gain = 128 (355 µA typical)

Full power: 23 nV rms at 9.4 SPS, gain = 128 (930 µA typical)

Up to 22 noise free bits in all power modes (gain = 1)

Output data rate

Power supply: 2.7 V to 3.6 V and 1.8 V

Independent interface power supply

Power-down current: 5 µA maximum

Temperature range: −40°C to +105°C

32-lead LFCSP/24-lead TSSOP

3-wire or 4-wire serial interface

SPI, QSPI, MICROWIRE, and DSP compatible

Schmitt trigger on SCLK

Full power: 9.38 SPS to 19,200 SPS

Mid power: 2.34 SPS to 4800 SPS

Low power: 1.17 SPS to 2400 SPS

Rail-to-rail analog inputs for gains > 1

Simultaneous 50 Hz/60 Hz rejection at 25 SPS (single cycle

settling)

Diagnostic functions (which aid safe integrity level (SIL)

certification)

Crosspoint multiplexed analog inputs

4 differential/7 pseudo differential inputs

Programmable gain (1 to 128)

Band gap reference with 15 ppm/°C drift maximum (65 µA)

Matched programmable excitation currents

Internal clock oscillator

ESD: 4 kV

APPLICATIONS

Temperature measurement

Pressure measurement

Industrial process control

Instrumentation

On-chip bias voltage generator

Smart transmitters

FUNCTIONAL BLOCK DIAGRAM

REGCAPA

IOV

DD REGCAPD

REFOUT

REFIN1(+) REFIN1(–)

BANDGAP

REF

REFIN2(+)

REFIN2(–)

BIAS

1.9V

LDO

1.8V

LDO

CROSSPOINT

MUX

AIN0/IOUT/VBIAS

AIN1/IOUT/VBIAS

REFERENCE

BUFFERS

DOUT/RDY

AIN2/IOUT/VBIAS/P1

AIN3/IOUT/VBIAS/P2

AIN4/IOUT/VBIAS

BUF

SERIAL

INTERFACE

AND

CONTROL

LOGIC

VARIABLE

DIGITAL

FILTER

24-BIT

Σ-Δ ADC

BURNOUT

DETECT

DIN

PGA1

PGA2

SCLK

AIN5/IOUT/VBIAS

X-MUX

AIN6/IOUT/VBIAS/REFIN2(+)

AIN7/IOUT/VBIAS/REFIN2(–)

ANALOG

BUFFERS

CHANNEL

SEQUENCER

SYNC

CLK

GPOs

TEMPERATURE

SENSOR

DIAGNOSTICS

COMMUNICATIONS

POWER SUPPLY

SIGNAL CHAIN

DIGITAL

DIAGNOSTICS

EXCITATION

CURRENTS

INTERNAL

CLOCK

PSW

POWER

SWITCH

AD7124-4

DGND

Figure 1.

Rev. A

Document Feedback

Information furnished by Analog Devices is believed to be accurate and reliable. However, no

responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other

rightsof third parties that may result fromits use. Specifications subject to change without notice. No

license is granted by implication or otherwise under any patent or patent rights of Analog Devices.

Trademarks andregisteredtrademarks are the property of their respective owners.

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.

Tel: 781.329.4700

Technical Support

www.analog.com

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AD7124-4BRUZ-RL 替代型号

型号	品牌	替代类型	描述	数据表
AD7124-4BRUZ	ADI	类似代替	4-Channel, Low Noise, Low Power, 24-Bit, Sigma-Delta ADC with PGA and Reference

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