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AD664JP PDF预览

AD664JP

更新时间: 2024-02-05 22:11:06
品牌 Logo 应用领域
亚德诺 - ADI /
页数 文件大小 规格书
20页 567K
描述
Monolithic 12-Bit Quad DAC

AD664JP 技术参数

生命周期:Obsolete零件包装代码:LCC
包装说明:QCCN,针数:44
Reach Compliance Code:unknownECCN代码:3A001.A.2.C
HTS代码:8542.39.00.01风险等级:5.61
最大模拟输出电压:10 V最小模拟输出电压:-10 V
转换器类型:D/A CONVERTER输入格式:PARALLEL, WORD
JESD-30 代码:S-CQCC-N44长度:16.545 mm
最大线性误差 (EL):0.012%标称负供电电压:-15 V
位数:12功能数量:1
端子数量:44最高工作温度:125 °C
最低工作温度:-55 °C封装主体材料:CERAMIC, METAL-SEALED COFIRED
封装代码:QCCN封装形状:SQUARE
封装形式:CHIP CARRIER认证状态:Not Qualified
座面最大高度:2.54 mm标称安定时间 (tstl):10 µs
最大压摆率:19 mA标称供电电压:15 V
表面贴装:YES技术:BIMOS
温度等级:MILITARY端子形式:NO LEAD
端子节距:1.27 mm端子位置:QUAD
宽度:16.545 mmBase Number Matches:1

AD664JP 数据手册

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Monolithic  
12-Bit Quad DAC  
a
AD664  
PIN CONFIGURATIONS  
FEATURES  
Four Complete Voltage Output DACs  
Data Register Readback Feature  
“Reset to Zero” Override  
44-Pin Package  
Multiplying Operation  
Double-Buffered Latches  
Surface Mount and DIP Packages  
MIL-STD-883 Compliant Versions Available  
APPLICATIONS  
Automatic Test Equipment  
Robotics  
Process Control  
Disk Drives  
Instrumentation  
Avionics  
PRODUCT DESCRIPTION  
The AD664 is four complete 12-bit, voltage-output DACs on  
one monolithic IC chip. Each DAC has a double-buffered input  
latch structure and a data readback function. All DAC read and  
write operations occur through a single microprocessor-compatible  
I/O port.  
28-Pin DIP Package  
The I/O port accommodates 4-, 8- or 12-bit parallel words al-  
lowing simple interfacing with a wide variety of microprocessors.  
A reset to zero control pin is provided to allow a user to simulta-  
neously reset all DAC outputs to zero, regardless of the contents  
of the input latch. Any one or all of the DACs may be placed in  
a transparent mode allowing immediate response by the outputs  
to the input data.  
The analog portion of the AD664 consists of four DAC cells,  
four output amplifiers, a control amplifier and switches. Each  
DAC cell is an inverting R-2R type. The output current from  
each DAC is switched to the on-board application resistors and  
output amplifier. The output range of each DAC cell is pro-  
grammed through the digital I/O port and may be set to unipo-  
lar or bipolar range, with a gain of one or two times the reference  
voltage. All DACs are operated from a single external reference.  
4. The asynchronous RESET control returns all D/A outputs  
to zero volts.  
5. DAC-to-DAC matching performance is specified and tested.  
The functional completeness of the AD664 results from the  
combination of Analog Devices’ BiMOS II process, laser-trimmed  
thin-film resistors and double-level metal interconnects.  
6. Linearity error is specified to be 1/2 LSB at room tempera-  
ture and 3/4 LSB maximum for the K, B and T grades.  
7. DAC performance is guaranteed to be monotonic over the  
full operating temperature range.  
PRODUCT HIGHLIGHTS  
1. The AD664 provides four voltage-output DACs on one chip  
offering the highest density 12-bit D/A function available.  
8. Readback buffers have tristate outputs.  
9. Multiplying-mode operation allows use with fixed or vari-  
able, positive or negative external references.  
2. The output range of each DAC is fully and independently  
programmable.  
10. The AD664 is available in versions compliant with MIL-  
STD-883. Refer to the Analog Devices Military Products  
Databook or current AD664/883B data sheet for detailed  
specifications.  
3. Readback capability allows verification of contents of the in-  
ternal data registers.  
REV. C  
Information furnished by Analog Devices is believed to be accurate and  
reliable. However, no responsibility is assumed by Analog Devices for its  
use, nor for any infringements of patents or other rights of third parties  
which may result from its use. No license is granted by implication or  
otherwise under any patent or patent rights of Analog Devices.  
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.  
Tel: 617/329-4700  
Fax: 617/326-8703  

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