Quad 16-/14-/12-Bit nanoDAC+
with 2 ppm/°C Reference, I2C Interface
Data Sheet
AD5696R/AD5695R/AD5694R
FEATURES
FUNCTIONAL BLOCK DIAGRAM
High relative accuracy (INL): 2 LSB maximum @ 16 bits
Low drift 2.5 V reference: 2 ppm/°C typical
V
GND
V
REF
DD
Tiny package: 3 mm × 3 mm, 16-lead LFCSP
2.5V
REFERENCE
AD5696R/AD5695R/AD5694R
Total unadjusted error (TUE): 0.1% of FSR maximum
Offset error: 1.5 mV maximum
V
LOGIC
SCL
STRING
DAC A
INPUT
DAC
V
V
V
V
A
B
C
D
OUT
OUT
OUT
OUT
REGISTER
REGISTER
BUFFER
BUFFER
BUFFER
BUFFER
Gain error: 0.1% of FSR maximum
High drive capability: 20 mA, 0.5 V from supply rails
User selectable gain of 1 or 2 (GAIN pin)
Reset to zero scale or midscale (RSTSEL pin)
1.8 V logic compatibility
STRING
DAC B
INPUT
REGISTER
DAC
REGISTER
SDA
A1
STRING
DAC C
INPUT
REGISTER
DAC
REGISTER
A0
Low glitch: 0.5 nV-sec
STRING
DAC D
INPUT
REGISTER
DAC
REGISTER
400 kHz I2C-compatible serial interface
Robust 3.5 kV HBM and 1.5 kV FICDM ESD rating
Low power: 3.3 mW at 3 V
POWER-ON
RESET
GAIN =
×1/×2
POWER-
DOWN
LOGIC
2.7 V to 5.5 V power supply
−40°C to +105°C temperature range
LDAC RESET
RSTSEL
GAIN
Figure 1.
APPLICATIONS
Optical transceivers
Base-station power amplifiers
Process control (PLC I/O cards)
Industrial automation
Data acquisition systems
Table 1. Quad nanoDAC+ Devices
Interface Reference 16-Bit
GENERAL DESCRIPTION
14-Bit
12-Bit
The AD5696R/AD5695R/AD5694R family, are low power,
quad, 16-/14-/12-bit buffered voltage output DACs. The devices
include a 2.5 V, 2 ppm/°C internal reference (enabled by
default) and a gain select pin giving a full-scale output of 2.5 V
(gain = 1) or 5 V (gain = 2). All devices operate from a single
2.7 V to 5.5 V supply, are guaranteed monotonic by design, and
exhibit less than 0.1% FSR gain error and 1.5 mV offset error
performance. The devices are available in a 3 mm × 3 mm
LFCSP and a TSSOP package.
SPI
I2C
Internal
Internal
AD5686R
AD5696R
AD5685R AD5684R
AD5695R AD5694R
PRODUCT HIGHLIGHTS
1. High Relative Accuracy (INL).
AD5696R (16-bit): 2 LSB maximum
AD5695R (14-bit): 1 LSB maximum
AD5694R (12-bit): 1 LSB maximum
2. Low Drift 2.5 V On-Chip Reference.
2 ppm/°C typical temperature coefficient
5 ppm/°C maximum temperature coefficient
3. Two Package Options.
The AD5696R/AD5695R/AD5694R also incorporate a power-
on reset circuit and a RSTSEL pin that ensures that the DAC
outputs power up to zero scale or midscale and remain there
until a valid write takes place. Each part contains a per-channel
power-down feature that reduces the current consumption of
the device to 4 µA at 3 V while in power-down mode.
3 mm × 3 mm, 16-lead LFCSP
The AD5696R/AD5695R/AD5694R use a versatile 2-wire serial
interface that operates at clock rates up to 400 kHz, and
includes a VLOGIC pin intended for 1.8 V/3 V/5 V logic.
16-lead TSSOP
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rightsof third parties that may result fromits use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks andregisteredtrademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
Fax: 781.461.3113
www.analog.com
©2012 Analog Devices, Inc. All rights reserved.
5秒后页面跳转
SL74HC10N：高性能三输入与非门解析
AIC1781A 电池充电控制器深度解析
Pickering新高压舌簧继电器亮相汽车测试博览会
采用MCU+MPU双处理器架构实现的创新应用设计探索
微信公众号
抖音公众号
浙公网安备 33010502006866号 浙ICP备10014259号-119
营业执照ICP证
数据手册
如果您发现信息不准确，
