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AD5625R_13 PDF预览

AD5625R_13

更新时间: 2024-11-28 12:27:55
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亚德诺 - ADI /
页数 文件大小 规格书
36页 1255K
描述
Quad, 12-/14-/16-Bit nanoDACs with 5 ppm/°C On-Chip Reference, I2C Interface

AD5625R_13 数据手册

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Quad, 12-/14-/16-Bit nanoDACs with  
5 ppm/°C On-Chip Reference, I2C Interface  
Data Sheet  
AD5625R/AD5645R/AD5665R, AD5625/AD5665  
FEATURES  
FUNCTIONAL BLOCK DIAGRAMS  
V
V
/V  
DD  
GND  
REFIN REFOUT  
Low power, smallest pin-compatible, quad nanoDACs  
AD5625R/AD5645R/AD5665R  
AD5625R/AD5645R/AD5665R  
1.25V/2.5V REF  
12-/14-/16-bit nanoDACs  
BUFFER  
BUFFER  
BUFFER  
BUFFER  
On-chip, 2.5 V, 5 ppm/°C reference in TSSOP  
On-chip, 2.5 V, 10 ppm/°C reference in LFCSP  
On-chip, 1.25 V, 10 ppm/°C reference in LFCSP  
AD5625/AD5665  
12-/16-bit nanoDACs  
External reference only  
INPUT  
DAC  
STRING  
DAC A  
V
V
V
V
A
B
C
D
OUT  
OUT  
OUT  
OUT  
ADDR1  
ADDR2  
SCL  
REGISTER  
REGISTER  
INPUT  
REGISTER  
DAC  
REGISTER  
STRING  
DAC B  
INPUT  
REGISTER  
DAC  
REGISTER  
STRING  
DAC C  
3 mm × 3 mm, 10-lead LFCSP; 14-lead TSSOP; and 1.665 mm  
× 2.245 mm, 12-ball WLCSP  
SDA  
INPUT  
REGISTER  
DAC  
REGISTER  
STRING  
DAC D  
2.7 V to 5.5 V power supply  
POWER-ON RESET  
POWER-DOWN LOGIC  
Guaranteed monotonic by design  
Power-on reset to zero scale/midscale  
Per channel power-down  
Hardware LDAC and CLR functions  
I2C-compatible serial interface supports standard (100 kHz),  
fast (400 kHz), and high speed (3.4 MHz) modes  
LDAC CLR  
POR  
NOTES  
1. THE FOLLOWING PINS ARE AVAILABLE ONLY ON 14-LEAD PACKAGE:  
ADDR2, LDAC, CLR, POR.  
Figure 1. AD5625R/AD5645R/AD5665R  
V
V
REFIN  
DD  
GND  
AD5625/AD5665  
APPLICATIONS  
BUFFER  
BUFFER  
BUFFER  
BUFFER  
Process control  
Data acquisition systems  
Portable battery-powered instruments  
Digital gain and offset adjustment  
Programmable voltage and current sources  
Programmable attenuators  
INPUT  
DAC  
STRING  
DAC A  
V
V
V
V
A
B
C
D
OUT  
OUT  
OUT  
OUT  
ADDR1  
ADDR2  
SCL  
REGISTER  
REGISTER  
INPUT  
REGISTER  
DAC  
REGISTER  
STRING  
DAC B  
INPUT  
REGISTER  
DAC  
REGISTER  
STRING  
DAC C  
GENERAL DESCRIPTION  
SDA  
The AD5625R/AD5645R/AD5665R and AD5625/AD5665  
members of the nanoDAC® family are low power, quad, 12-/  
14-/16-bit, buffered voltage-out DACs with/without an on-chip  
reference. All devices operate from a single 2.7 V to 5.5 V supply,  
are guaranteed monotonic by design, and have an I2C-compatible  
serial interface.  
INPUT  
REGISTER  
DAC  
REGISTER  
STRING  
DAC D  
POWER-ON RESET  
POWER-DOWN LOGIC  
LDAC CLR  
POR  
NOTES  
1. THE FOLLOWING PINS ARE AVAILABLE ONLY ON 14-LEAD PACKAGE:  
ADDR2, LDAC, CLR, POR.  
Figure 2. AD5625/AD5665  
The AD5625R/AD5645R/AD5665R have an on-chip reference. The  
LFCSP versions of the AD56x5R have a 1.25 V or 2.5 V, 10 ppm/°C  
reference, giving a full-scale output range of 2.5 V or 5 V; the  
TSSOP versions of the AD56x5R have a 2.5 V, 5 ppm/°C refer-  
ence, giving a full-scale output range of 5 V. The WLCSP package  
has a 1.25 V reference. The on-chip reference is off at power-up,  
allowing the use of an external reference. The internal reference is  
enabled via a software write. The AD5625/AD5665 require an  
external reference voltage to set the output range of the DAC.  
The AD56x5R/AD56x5 use a 2-wire I2C-compatible serial  
interface that operates in standard (100 kHz), fast (400 kHz),  
and high speed (3.4 MHz) modes.  
Table 1. Related Devices  
Part No.  
Description  
AD5025/AD5045/AD5065  
Dual 12-/14-/16-bit DACs  
AD5624R/AD5644R/AD5664R,  
AD5624/AD5664  
Quad SPI 12-/14-/16-bit DACs,  
with/without internal reference  
Dual I2C 12-/14-/16-bit DACs,  
with/without internal reference  
AD5627R/AD5647R/AD5667R,  
AD5627/AD5667  
The part incorporates a power-on reset circuit that ensures that  
the DAC output powers up to 0 V (POR = GND) or midscale  
(POR = VDD) and remains there until a valid write occurs. The  
on-chip precision output amplifier enables rail-to-rail output swing.  
AD5666  
Quad SPI 16-bit DAC with internal  
reference  
Rev. C  
Document Feedback  
Information furnished by Analog Devices is believed to be accurate and reliable. However, no  
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other  
rights of third parties that may result from its use. Specifications subject to change without notice. No  
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.  
Trademarks and registeredtrademarks arethe property of their respective owners.  
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.  
Tel: 781.329.4700  
Technical Support  
©2007-2013 Analog Devices, Inc. All rights reserved.  
www.analog.com  
 
 
 

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