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AD5516_03

更新时间: 2022-05-20 03:03:22
品牌 Logo 应用领域
亚德诺 - ADI /
页数 文件大小 规格书
16页 228K
描述
16-Channel, 12-Bit Voltage-Output DAC with 14-Bit Increment Mode

AD5516_03 数据手册

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16-Channel, 12-Bit Voltage-Output DAC  
with 14-Bit Increment Mode  
AD5516*  
FEATURES  
GENERAL DESCRIPTION  
High Integration:  
16-Channel DAC in 12 mm 
؋
 12 mm CSPBGA  
The AD5516 is a 16-channel, 12-bit voltage-output DAC. The  
selected DAC register is written to via the 3-wire serial inter-  
14-Bit Resolution via Increment/Decrement Mode  
Guaranteed Monotonic  
face. DAC selection is accomplished via address bits A3–A0.  
14-bit resolution can be achieved by fine adjustment in Incre-  
ment/Decrement Mode (Mode 2). The serial interface operates  
at clock rates up to 20 MHz and is compatible with standard  
SPI, MICROWIRE, and DSP interface standards. The output  
voltage range is fixed at ±2.5 V (AD5516-1), ±5 V (AD5516-2),  
and ±10 V (AD5516-3). Access to the feedback resistor in each  
channel is provided via the RFB0 to RFB15 pins.  
Low Power, SPI®, QSPI™  
DSP Compatible  
, MICROWIRE™, and  
3-Wire Serial Interface  
Output Impedance 0.5 ⍀  
Output Voltage Range  
؎2.5 V (AD5516-1)  
؎5 V (AD5516-2)  
؎10 V (AD5516-3)  
Asynchronous Reset Facility (via RESET Pin)  
Asynchronous Power-Down Facility (via PD Pin)  
Daisy-Chain Mode  
The device is operated with AVCC = 5 V ± 5%, DVCC = 2.7 V  
to 5.25 V, VSS = –4.75 V to –12 V, and VDD = +4.75 V to +12 V,  
and requires a stable 3 V reference on REF_IN.  
PRODUCT HIGHLIGHTS  
1. Sixteen 12-bit DACs in one package, guaranteed monotonic.  
Temperature Range: –40؇C to +85؇C  
APPLICATIONS  
Level Setting  
Instrumentation  
2. Available in a 74-lead CSPBGA package with a body size of  
12 mm ϫ 12 mm.  
Automatic Test Equipment  
Optical Networks  
Industrial Control Systems  
Data Acquisition  
Low Cost I/O  
FUNCTIONAL BLOCK DIAGRAM  
DV  
AV  
CC  
V
V
SS  
REF_IN  
CC  
DD  
V
BIAS  
R
R
R
R
R
FB  
FB  
FB  
FB  
OFFS  
R
0
FB  
AD5516  
V
0
OUT  
DAC  
DAC  
DAC  
DAC  
R
RESET  
BUSY  
OFFS  
R
1
FB  
V
1
ANALOG  
CALIBRATION  
LOOP  
OUT  
R
OFFS  
R
14  
FB  
DACGND  
V
14  
OUT  
AGND  
DGND  
R
OFFS  
MODE1  
R
15  
FB  
V
15  
OUT  
INTERFACE  
CONTROL  
LOGIC  
MODE2  
7-BIT BUS  
DCEN  
POWER-DOWN  
LOGIC  
SCLK  
D
D
PD  
SYNC  
OUT  
IN  
*Protected by U.S. Patent No.  
5,969,657.  
REV. B  
Information furnished by Analog Devices is believed to be accurate and  
reliable. However, no responsibility is assumed by Analog Devices for its  
use, norforanyinfringementsofpatentsorotherrightsofthirdpartiesthat  
may result from its use. No license is granted by implication or otherwise  
under any patent or patent rights of Analog Devices. Trademarks and  
registered trademarks are the property of their respective companies.  
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.  
Tel: 781/329-4700  
Fax: 781/326-8703  
www.analog.com  
© 2003 Analog Devices, Inc. All rights reserved.  

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