Datasheet > AD5340BRUZ-REEL1

AD5340BRUZ-REEL1

更新时间： 2024-11-07 12:27:15

品牌	Logo	应用领域
亚德诺 - ADI		/
页数	文件大小	规格书
28页	542K
描述
2.5 V to 5.5 V, 115 Î¼A, Parallel Interface Single Voltage-Output 8-/10-/12-Bit DACs

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AD5340BRUZ-REEL1 数据手册

2.5 V to 5.5 V, 115 μA, Parallel Interface

Single Voltage-Output 8-/10-/12-Bit DACs

AD5330/AD5331/AD5340/AD5341

FEATURES

GENERAL DESCRIPTION

AD5330: single 8-bit DAC in 20-lead TSSOP

AD5331: single 10-bit DAC in 20-lead TSSOP

AD5340: single 12-bit DAC in 24-lead TSSOP

AD5341: single 12-bit DAC in 20-lead TSSOP

Low power operation: 115 μA @ 3 V, 140 μA @ 5 V

The AD5330/AD5331/AD5340/AD5341¹are single 8-/10-/12-

bit DACs. They operate from a 2.5 V to 5.5 V supply consuming

just 115 μA at 3 V and feature a power-down mode that further

reduces the current to 80 nA. The devices incorporate an on-chip

output buffer that can drive the output to both supply rails, but

Power-down to 80 nA @ 3 V, 200 nA @ 5 V via

2.5 V to 5.5 V power supply

the AD5330, AD5340, and AD5341 allow a choice of buffered

or unbuffered reference input.

Double-buffered input logic

The AD5330/AD5331/AD5340/AD5341 have a parallel

Guaranteed monotonic by design over all codes

Buffered/unbuffered reference input options

Output range: 0 V to V_REFor 0 V to 2 × V_REF

Power-on reset to 0 V

interface.

input registers on the rising edge of

The GAIN pin allows the output range to be set at 0 V to V_REFor

0 V to 2 × V_REF

Input data to the DACs is double-buffered, allowing simultane-

LDAC

selects the device and data is loaded into the

LDAC

Simultaneous update of DAC outputs via

CLR

Asynchronous

facility

Low power parallel data interface

On-chip rail-to-rail output buffer amplifiers

Temperature range: −40°C to +105°C

ous update of multiple DACs in a system using the

pin.

input is also provided, which resets the

CLR

An asynchronous

contents of the input register and the DAC register to all zeros.

These devices also incorporate a power-on reset circuit that

ensures that the DAC output powers on to 0 V and remains

there until valid data is written to the device.

APPLICATIONS

Portable battery-powered instruments

Digital gain and offset adjustment

Programmable voltage and current sources

Programmable attenuators

The AD5330/AD5331/AD5340/AD5341 are available in thin

shrink small outline packages (TSSOP).

Industrial process control

¹Protected by U.S. Patent Number 5,969,657.

FUNCTIONAL BLOCK DIAGRAM

REF

POWER-ON

RESET

AD5330

BUF

GAIN

DAC

INPUT

8-BIT

DAC

BUFFER

OUT

CLR

RESET

POWER-DOWN

LOGIC

LDAC

PD GND

Figure 1. AD5330

Rev. A

Information furnished by Analog Devices is believed to be accurate and reliable. However, no

responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other

rights of third parties that may result from its use. Specifications subject to change without notice. No

license is granted by implication or otherwise under any patent or patent rights of Analog Devices.

Trademarks and registeredtrademarks arethe property of their respective owners.

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.

Tel: 781.329.4700 www.analog.com

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与AD5340BRUZ-REEL1相关器件

型号	品牌	获取价格	描述	数据表
AD5340BRUZ-REEL7	ADI	获取价格	2.5 V to 5.5 V, 115 µA, Parallel Interface Single Voltage Output 12-Bit DAC
AD5340BRUZ-REEL71	ADI	获取价格	2.5 V to 5.5 V, 115 Î¼A, Parallel Interface S
AD5341	ADI	获取价格	2.5 V to 5.5 V, 115 uA, Parallel Interface Single Voltage-Output 8-/10-/12-Bit DACs
AD5341BRU	ADI	获取价格	2.5 V to 5.5 V, 115 uA, Parallel Interface Single Voltage-Output 8-/10-/12-Bit DACs
AD5341BRU-REEL	ADI	获取价格	2.5 V to 5.5 V, 115 Î¼A, Parallel Interface S
AD5341BRU-REEL7	ADI	获取价格	2.5 V to 5.5 V, 115 Î¼A, Parallel Interface S
AD5341BRUZ	ADI	获取价格	2.5V to 5.5V, 115µA Parallel Interface Single Voltage Output 12-Bit DAC
AD5341BRUZ1	ADI	获取价格	2.5 V to 5.5 V, 115 Î¼A, Parallel Interface S
AD5341BRUZ-REEL	ADI	获取价格	暂无描述
AD5341BRUZ-REEL1	ADI	获取价格	2.5 V to 5.5 V, 115 Î¼A, Parallel Interface S

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