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AD53041KRP PDF预览

AD53041KRP

更新时间： 2024-01-04 13:50:27
品牌 Logo 应用领域
亚德诺 - ADI /
页数 文件大小 规格书
4页 81K
描述
High Speed Active Load with Inhibit Mode

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AD53041KRP 技术参数

是否无铅： 含铅是否Rohs认证： 不符合
生命周期：Active零件包装代码：SOIC
包装说明：HSOP,针数：20
Reach Compliance Code：unknown风险等级：5.67
其他特性：ALSO OPERATES WITH 15.2V TO 16.2V (-VS TO +VS) SUPPLY模拟集成电路 - 其他类型：ANALOG CIRCUIT
JESD-30 代码：R-PDSO-G20JESD-609代码：e0
长度：12.8 mm湿度敏感等级：3
负电源电压最大值（Vsup）：-5.4 V负电源电压最小值（Vsup）：-5 V
标称负供电电压 (Vsup)：-5.2 V功能数量：1
端子数量：20最高工作温度：85 °C
最低工作温度：-25 °C封装主体材料：PLASTIC/EPOXY
封装代码：HSOP封装形状：RECTANGULAR
封装形式：SMALL OUTLINE, HEAT SINK/SLUG峰值回流温度（摄氏度）：225
认证状态：COMMERCIAL座面最大高度：2.65 mm
最大供电电压 (Vsup)：10.8 V最小供电电压 (Vsup)：10.2 V
标称供电电压 (Vsup)：10.5 V表面贴装：YES
温度等级：OTHER端子面层：TIN LEAD
端子形式：GULL WING端子节距：1.27 mm
端子位置：DUAL处于峰值回流温度下的最长时间：30
宽度：7.5 mmBase Number Matches：1

AD53041KRP 数据手册

 浏览型号AD53041KRP的Datasheet PDF文件第2页浏览型号AD53041KRP的Datasheet PDF文件第3页浏览型号AD53041KRP的Datasheet PDF文件第4页 
High Speed Active Load  
with Inhibit Mode  
a
AD53041  
FUNCTIONAL BLOCK DIAGRAM  
FEATURES  
؎50 mA Voltage Programmable Current Range  
Three Selectable Gain Ranges  
1.7 ns Propagation Delay  
GAINA  
GAINB  
VOLTAGE-TO-CURRENT  
CONVERTER  
Inhibit Mode Function  
High Speed Differential Inputs for Maximum Flexibility  
Ultrasmall 20-Lead PSOP Package with Built-In Heatsink  
I
OLPGM  
INH  
I
OLOUT  
APPLICATIONS  
I
OLRTN  
Automatic Test Equipment  
Semiconductor Test Systems  
Board Test Systems  
I
OHRTN  
INH  
I
OHOUT  
I
OHPGM  
VOLTAGE-TO-CURRENT  
CONVERTER  
AD53041  
PRODUCT DESCRIPTION  
V
COMIN  
V
COMOUT  
The AD53041 is a complete, high speed, current switching load  
designed for use in linear, digital or mixed signal test systems.  
Combining a high speed monolithic process with a unique sur-  
face mount package, this product attains superb electrical per-  
formance while preserving optimum packaging densities in an  
ultrasmall 20-lead, PSOP package with a built-in heatsink.  
V
OUT_SENSE  
COM  
BUFFER  
GAINA GAINB FULL-SCALE CURRENT  
0
0
1
1
0
1
0
1
50mA  
16mA  
5mA  
NOT VALID  
Featuring current programmability of up to ±50 mA, the  
AD53041 is designed to force the device under test to source  
or sink the programmed IOH and IOL currents. IOH and IOL  
currents are determined by applying a corresponding voltage  
(5 V = 50 mA, 16 mA, 5 mA) to the IOHPGM and IOLPGM pins.  
The voltage-to-current conversion is performed within the  
AD53041, thus allowing the current levels to be set by a stan-  
dard voltage out digital-to-analog converter.  
The AD53041 is available in a 20-lead, PSOP package with a  
built-in-heatsink and is specified to operate over the ambient  
commercial temperature range from –25°C to +85°C.  
INH  
V
CC  
AD53041  
V
EE  
0.1␮F  
0.1␮F  
INH  
AGND  
I
The AD53041 transition from IOH to IOL occurs when the out-  
put voltage of the device under test slews above or below the  
programmed threshold or commutation voltage. The commuta-  
tion voltage is programmable from –2 V to +7 V, covering the  
large spectrum of logic devices while able to support the large  
current specifications (48 mA) typically associated with line  
drivers. To test I/O devices, the active load can be switched into  
a high impedance state (Inhibit Mode), electrically removing the  
active load from the path through the Inhibit Mode feature. The  
active load leakage current in Inhibit is typically 100 nA.  
OLOUT  
I
OHPGM  
V
COMIN  
TO DUT  
V
COMOUT  
OUT_SENSE  
1Ω  
I
OLPGM  
0.1␮F  
HSMS-2818  
OR EQUIV.  
GAINA  
GAINB  
I
OHOUT  
I
OLRTN  
I
OHRTN  
GND  
NOT SHOWN: THE AGND PINS ARE THE HIGH QUALITY GROUND  
REFERENCE FOR THE VOLTAGE-TO-CURRENT CONVERTERS.  
THE GND PINS PROVIDE RETURN PATHS FOR INTERNAL CURRENTS.  
The Inhibit input circuitry is implemented using high speed  
differential inputs with a common-mode voltage range of  
–2 V to +3 V and a maximum differential voltage of 3 V. This  
allows for direct interface to precision differential ECL timing or  
the simplicity of switching active load from a single ended TTL  
or CMOS logic source. With switching speeds from IOH or IOL  
into Inhibit of less than 2.0 ns, the AD53041 can be electrically  
removed from the signal path “on the fly.”  
V
IS THE POSITIVE SUPPLY, V IS THE NEGATIVE SUPPLY.  
CC  
EE  
ALL GROUND PINS SHOULD BE CONNECTED TO THE SYSTEM  
ANALOG GROUND PLANE.  
Figure 1. Typical Application Circuit  
REV. A  
Information furnished by Analog Devices is believed to be accurate and  
reliable. However, no responsibility is assumed by Analog Devices for its  
use, nor for any infringements of patents or other rights of third parties  
which may result from its use. No license is granted by implication or  
otherwise under any patent or patent rights of Analog Devices.  
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.  
Tel: 781/329-4700  
Fax: 781/326-8703  
World Wide Web Site: http://www.analog.com  
© Analog Devices, Inc., 1998  
1234

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