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AD5259BCPZ50-R7 PDF预览

AD5259BCPZ50-R7

更新时间: 2024-11-30 22:26:03
品牌 Logo 应用领域
亚德诺 - ADI 转换器电位器数字电位计电阻器
页数 文件大小 规格书
24页 989K
描述
Nonvolatile, I2C-Compatible 256-Position, Digital Potentiometer

AD5259BCPZ50-R7 数据手册

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Nonvolatile, I2C-Compatible  
256-Position, Digital Potentiometer  
AD5259  
FUNCTIONAL BLOCK DIAGRAMS  
FEATURES  
Nonvolatile memory maintains wiper settings  
256-position  
Thin LFCSP-10 (3 mm x 3 mm x 0.8 mm) package  
Compact MSOP-10 (3 mm × 4.9 mm x 1.1mm) package  
I2C®-compatible interface  
VLOGIC pin provides increased interface flexibility  
End-to-end resistance 5 kΩ, 10 kΩ, 50 kΩ, 100 kΩ  
Resistance tolerance stored in EEPROM (0.1% accuracy)  
Power-on EEPROM refresh time < 1ms  
Software write protect command  
RDAC  
V
DD  
A
RDAC  
V
RDAC  
LOGIC  
EEPROM  
W
B
REGISTER  
GND  
8
8
DATA  
CONTROL  
SCL  
SDA  
2
I C  
SERIAL  
INTERFACE  
AD0  
AD1  
COMMAND  
DECODE LOGIC  
AD5259  
ADDRESS  
DECODE LOGIC  
POWER-  
ON RESET  
CONTROL LOGIC  
Address Decode Pin AD0 and Pin AD1 allow  
4 packages per bus  
Figure 1. Block Diagram  
100-year typical data retention at 55°C  
Wide operating temperature 40°C to +85°C  
3 V to 5 V single supply  
V
V
DD  
LOGIC  
A
EEPROM  
SCL  
RDAC  
REGISTER  
AND  
APPLICATIONS  
2
I
C
SDA  
AD0  
AD1  
SERIAL  
INTERFACE  
LEVEL  
LCD panel VCOM adjustment  
SHIFTER  
W
LCD panel brightness and contrast control  
Mechanical potentiometer replacement in new designs  
Programmable power supplies  
RF amplifier biasing  
COMMAND  
DECODE LOGIC  
ADDRESS  
DECODE LOGIC  
CONTROL  
LOGIC  
GND  
B
Automotive electronics adjustment  
Gain control and offset adjustment  
Fiber to the home systems  
Figure 2. Block Diagram Showing Level Shifters  
Electronics level settings  
CONNECTION DIAGRAM  
GENERAL DESCRIPTION  
W
AD0  
AD1  
SDA  
SCL  
1
2
3
4
5
10  
9
A
B
V
The AD5259 provides a compact, nonvolatile LFCSP-10  
(3 mm × 3 mm) or MSOP-10 (3 mm × 4.9 mm) packaged  
solution for 256-position adjustment applications. These  
devices perform the same electronic adjustment function  
as mechanical potentiometers1 or variable resistors, but  
with enhanced resolution and solid-state reliability.  
AD5259  
8
TOP VIEW  
DD  
(Not to Scale)  
7
GND  
6
V
LOGIC  
Figure 3. Pinout  
The wiper settings are controllable through an I2C-compatible  
digital interface that is also used to read back the wiper register  
and EEPROM content. Resistor tolerance is also stored within  
EEPROM, providing an end-to-end tolerance accuracy of 0.1%.  
1 The terms digital potentiometer, VR (variable resistor), and RDAC are used  
interchangeably.  
A separate VLOGIC pin delivers increased interface flexibility. For  
users who need multiple parts on one bus, Address Bit AD0 and  
Address Bit AD1 allow up to four devices on the same bus.  
Rev. A  
Information furnished by Analog Devices is believed to be accurate and reliable.  
However, no responsibility is assumed by Analog Devices for its use, nor for any  
infringements of patents or other rights of third parties that may result from its use.  
Specifications subject to change without notice. No license is granted by implication  
or otherwise under any patent or patent rights of Analog Devices. Trademarks and  
registered trademarks are the property of their respective owners.  
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.  
Tel: 781.329.4700  
Fax: 781.461.3113  
www.analog.com  
© 2005 Analog Devices, Inc. All rights reserved.  

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