Low Cost
a
LVDT-to-Digital Converter
AD2S93
FEATURES
FUNCTIONAL BLOCK DIAGRAM
Full Function Monolithic LVDT-to-Digital Converter
Absolute Serial Data Output
Uncommitted Differential Input
Repeatability
Remote Diagnostics
14-Bit Resolution
C3
R5
C4
ACERROR
R6
DEMODIN
REFERENCE
(PRIMARY
EXCITATION)
ERROR
AMP
PHASE
SENSITIVE
REF
Industrial Temperature Range
28-Pin PLCC
Low Power
DEMODULATOR
AC RATIO
BRIDGE
DIFFERENTIAL
(SECONDARY
VOLTAGE)
DEMOD OUT
A
B
R7
INTIN
R1
R4
GAIN
APPLICATIONS
Industrial Gauging
DIFF
LOS
R2
C1
FREQUENCY
SHAPING
R3
C2
LOS
V
DD
Industrial Process Control
Linear Positioning Systems
Linear Actuator Control
Automotive Motion Sensing and Control
Torque Sensing Conditioner
AC Strain Gages Conditioning
Avionics
VEL
VCO GAIN
UP-DOWN
COUNTER
OVR
UNR
DECODE
LOGIC
VCO
DIR
NULL
CS
CLKOUT
LATCHES
AD2S93
DATA
SCLK
SERIAL
INTERFACE
GENERAL DESCRIPTION
DIFF output is the resultant A–B. The AD2S93 operates using
±5 V ± 5% power supplies and is fabricated on Analog Devices’
linear compatible CMOS process (LC2MOS). The (LC2MOS)
is a mixed technology process that combines precision bipolar
circuits with low power logic.
The AD2S93 is a complete 14-bit resolution tracking LVDT-to-
digital converter. A Type II tracking loop is employed to track
the A–B input and produce a digital output equal to (A–B)/
(REF/2), where REF is a fixed amplitude ac reference phase co-
herent with the A–B input. This allows the measurement of any
2-, 3-, 4- and 5-wire LVDT or linear amplitude modulated in-
put. The operating frequency range is from 360 Hz to 10 kHz
with user definable bandwidth set externally within a range of
45 Hz to 1250 Hz.
PRODUCT HIGHLIGHTS
Complete LVDT-to-Digital Interface. The AD2S93 pro-
vides the complete solution for digitizing LVDT signals to 14-
bit resolution.
The AD2S93 has a 16-bit serial output. The MSB (LOS), read
first, indicates a loss of the signal A, B, or reference inputs to the
converter or transducer. The second and third MSBs are flags
indicating whether [–REF/2 (UNR) ≤ A–B ≤ +REF/2 (OVR]) is
outside the linear operating range of the converter. The dis-
placement data is presented as 13-bit offset binary giving a ±12-
bit operating range. LOS, OVR and UNR are pinned out on
the device, in addition a NULL flag is available which is set
when (A–B) = 0.
Serial 16-Bit Output Data. One 16-bit read from the
AD2S93 determines input signal continuity (LOS), over and
underrange detection and 13 bits of offset binary displacement
information.
High Accuracy Grade in Low Cost Package. 0.05% and
0.1% integral linearity over the full –40°C to +85°C operating
temperature range.
Uncommitted Differential Input. Allows configuration of 2-,
3-, 4- and 5-wire LVDTs.
Absolute displacement information is accessed when CS is taken
LO followed by the application of an external clock (SCLK)
with a maximum rate of 2 MHz. Data is read MSB first. When
CS is high the DATA output is high impedance; this allows
daisy chaining of more than one converter onto a common bus.
Multiple Converter Interfacing. High impedance data out-
put and a simple three-wire interface reduces cabling and elimi-
nates bus contention.
Low Power. 70 mW power consumption (typ).
The A, B differential input allows the user to scale the A, B in-
puts between 1 and 10. This enables the user to accurately set
up the inputs matching the REF input to the DIFF output. The
REV. A
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood. MA 02062-9106, U.S.A.
Tel: 617/329-4700
Fax: 617/326-8703
5秒后页面跳转
SK海力士量产12层HBM3E，容量高达36GB
意法半导体传感器驱动Sphere，开启沉浸式电影新时代
摩尔斯微电子在美国约书亚树国家公园测试 Wi-Fi HaLow
贸泽上架Tallysman TW5386智能GNSS天线
微信公众号
抖音公众号
浙公网安备 33010502006866号 浙ICP备10014259号-119
营业执照ICP证
数据手册
如果您发现信息不准确，
