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AD1843JST PDF预览

AD1843JST

更新时间： 2024-01-29 22:26:05
品牌 Logo 应用领域
亚德诺 - ADI 解码器编解码器
页数 文件大小 规格书
64页 848K
描述
Serial-Port 16-Bit SoundComm Codec

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AD1843JST 技术参数

是否Rohs认证： 不符合生命周期：Obsolete
零件包装代码：QFP包装说明：PLASTIC, TQFP-100
针数：100Reach Compliance Code：not_compliant
ECCN代码：EAR99HTS代码：8542.39.00.01
风险等级：5.87其他特性：IT ALSO REQUIRES 2.85 V TO 5.25 SUPPLY
商用集成电路类型：CONSUMER CIRCUITJESD-30 代码：S-PQFP-G100
JESD-609代码：e0长度：14 mm
功能数量：1端子数量：100
最高工作温度：70 °C最低工作温度：
封装主体材料：PLASTIC/EPOXY封装代码：LFQFP
封装形状：SQUARE封装形式：FLATPACK, LOW PROFILE, FINE PITCH
峰值回流温度（摄氏度）：NOT SPECIFIED认证状态：Not Qualified
座面最大高度：1.55 mm最大供电电压 (Vsup)：5.25 V
最小供电电压 (Vsup)：4.75 V表面贴装：YES
温度等级：COMMERCIAL端子面层：Tin/Lead (Sn/Pb)
端子形式：GULL WING端子节距：0.5 mm
端子位置：QUAD处于峰值回流温度下的最长时间：NOT SPECIFIED
宽度：14 mmBase Number Matches：1

AD1843JST 数据手册

 浏览型号AD1843JST的Datasheet PDF文件第2页浏览型号AD1843JST的Datasheet PDF文件第3页浏览型号AD1843JST的Datasheet PDF文件第4页浏览型号AD1843JST的Datasheet PDF文件第5页浏览型号AD1843JST的Datasheet PDF文件第6页浏览型号AD1843JST的Datasheet PDF文件第7页 
Serial-Port 16-Bit  
SoundComm Codec  
a
AD1843  
FEATURES  
GENERAL PRODUCT DESCRIPTION  
Single Chip Integrated Speech, Audio, Fax and Modem  
Codec  
Highly Configurable Stereo ∑∆ ADCs and Quad ∑∆ DACs  
Supports V.34, V.32bis, and Fallback Modem Standards  
As Well As Voice Over Data  
Dual Digital Resamplers with Programmable Input and  
Output Phase and Frequency  
Three On-Chip Phase Lock Loops for Synchronization to  
External Signals, Including Video  
Thirteen Analog Inputs and Seven Analog Outputs  
Advanced Analog and Digital Signal Mixing and Digital-  
to-Digital Sample Rate Conversion  
Programmable Gain, Attenuation and Mute  
On-Chip Signal Filters  
The AD1843 SoundComm™ Codec is a complete analog front  
end for high performance DSP-based telephony and audio ap-  
plications. The device integrates the real-world analog I/O re-  
quirements for many popular functions thereby reducing size,  
power consumption, and system complexity. The AD1843  
SoundComm is the world’s first codec which can support four  
different sample rates simultaneously, without any beat fre-  
quency noise issues. This is essential for highly integrated audio/  
modem/fax products since the sample rates associated with au-  
dio are very much distinct from the sample rates associated with  
telephony-oriented data communication. It is also the first codec  
to offer on-chip digital phase lock loops for sample rate synchro-  
nization to external clock signals. This sample rate flexibility is  
enabled through Analog Devices’ Continuous Time Oversampling  
(CTO) technology.  
Digital Interpolation and Decimation  
Analog Output Low Pass  
The main elements of the AD1843 are its extensive input and mix-  
ing section, its two channels of sigma-delta (∑∆) analog-to-digital  
conversion, its four channels of ∑∆ digital-to-analog conversion, its  
digital filters, and the clock and control circuitry for implementing  
the device’s different modes. The AD1843 permits flexible sample-  
rate selection through programming and external synchronization,  
many input and output options, and many mixing options.  
1 Hz Resolution Programmable Sample Rates from 4 kHz  
to 54 kHz Derived from a Single Clock Input  
80-Lead PQFP and 100-Lead TQFP Packages  
Operation from +5 V or Mixed +5 V/+3 V Supplies  
FIFO-Buffered Serial Digital Interface Compatible with  
ADSP-21xx Fixed-Point DSPs  
Advanced Power Management  
VHDL Model of Serial Port Available; Evaluation Board  
and MAFE Board Available  
(continued on page 11)  
SoundComm is a trademark of Analog Devices, Inc.  
SIMPLIFIED FUNCTIONAL BLOCK DIAGRAM  
SYNC XTAL CONV  
BIT  
3
2
3
3
4
LIN  
CLOCK GENERATION  
AD1843  
CLKOUT  
20 dB  
S
E
L
E
C
T
2
2
2
2
1
CONTROL  
MIC  
AUX1  
AUX2  
AUX3  
MIN  
REGISTERS  
S
E
L
E
C
T
∑∆  
ADC  
PGA  
S
E
L
E
C
T
O
R
µ/A  
LAW  
O
R
SCLK  
SDFS  
SDI  
ADC  
D
I
G
I
T
A
L
O
R
ATTN  
MUTE  
MUTE  
GAM GAM GAM GAM GAM  
SDO  
BM  
MOUT  
MUTE  
M
U
T
2
µ/A  
LAW  
∑∆  
DAC  
CS  
∑
∑
∑
∑
∑
∑
GAM  
ATTN  
FIFO  
DAC1  
LOUT1  
∑
E
I
TSO  
LEFT AND  
N
T
E
R
F
A
C
E
RIGHT CHANNELS  
DRIVER  
MUTE  
MUTE  
TSI  
GAM  
MUTE  
ATTN  
2
XCTL [1:0]  
GAM = GAIN  
ATTENUATION  
MUTE  
HPOUTL  
HPOUTC  
HPOUTR  
LOUT2  
PDMNFT  
MUTE  
MUTE  
LEFT AND  
M
U
T
4
2
RIGHT CHANNELS  
∑∆  
DAC  
µ/A  
LAW  
∑
GAM  
ATTN  
∑
FIFO  
DAC2  
E
SUM  
VOLTAGE REFERENCE  
4
8
9
3
V
V
DD  
GNDA  
GNDD  
CC  
V
FILTR  
CMOUT  
AAFILTL AAFILTR  
FILTL  
REF  
REV. 0  
© Analog Devices, Inc., 1996  
Information furnished by Analog Devices is believed to be accurate and  
reliable. However, no responsibility is assumed by Analog Devices for its  
use, nor for any infringements of patents or other rights of third parties  
which may result from its use. No license is granted by implication or  
otherwise under any patent or patent rights of Analog Devices.  
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.  
Tel: 617/329-4700 Fax: 617/326-8703  
1234567...64

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