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ADSP-BF525KBCZ-6A PDF预览

ADSP-BF525KBCZ-6A

更新时间: 2024-01-01 09:25:01
品牌 Logo 应用领域
亚德诺 - ADI 微控制器和处理器外围集成电路数字信号处理器PC时钟
页数 文件大小 规格书
88页 2932K
描述
Blackfin Embedded Processor

ADSP-BF525KBCZ-6A 技术参数

是否无铅: 含铅是否Rohs认证: 符合
生命周期:Active零件包装代码:BGA
包装说明:FBGA, BGA208,20X20,32针数:208
Reach Compliance Code:compliantECCN代码:3A991.A.2
HTS代码:8542.31.00.01风险等级:2.18
Samacsys Confidence:Samacsys Status:Released
Schematic Symbol:https://componentsearchengine.com/symbol.php?partID=421286PCB Footprint:https://componentsearchengine.com/footprint.php?partID=421286
Samacsys PartID:421286Samacsys Image:https://componentsearchengine.com/Images/9/ADSP-BF525KBCZ-6A.jpg
Samacsys Thumbnail Image:https://componentsearchengine.com/Thumbnails/1/ADSP-BF525KBCZ-6A.jpgSamacsys Pin Count:208
Samacsys Part Category:Integrated CircuitSamacsys Package Category:Other
Samacsys Footprint Name:BGA208C80P20X20_1700X1700X175Samacsys Released Date:2017-01-11 11:21:59
Is Samacsys:N地址总线宽度:19
桶式移位器:YES位大小:32
边界扫描:YES最大时钟频率:50 MHz
外部数据总线宽度:16格式:FIXED POINT
内部总线架构:MULTIPLEJESD-30 代码:S-PBGA-B208
JESD-609代码:e1长度:17 mm
低功率模式:YES湿度敏感等级:3
端子数量:208最高工作温度:70 °C
最低工作温度:封装主体材料:PLASTIC/EPOXY
封装代码:FBGA封装等效代码:BGA208,20X20,32
封装形状:SQUARE封装形式:GRID ARRAY, FINE PITCH
峰值回流温度(摄氏度):260电源:1.2,2.5/3.3 V
认证状态:Not Qualified座面最大高度:1.75 mm
速度:600 MHz子类别:Microprocessors
最大供电电压:1.9 V最小供电电压:1.7 V
标称供电电压:1.8 V表面贴装:YES
技术:CMOS温度等级:COMMERCIAL
端子面层:Tin/Silver/Copper (Sn/Ag/Cu)端子形式:BALL
端子节距:0.8 mm端子位置:BOTTOM
处于峰值回流温度下的最长时间:30宽度:17 mm
uPs/uCs/外围集成电路类型:DIGITAL SIGNAL PROCESSOR, OTHERBase Number Matches:1

ADSP-BF525KBCZ-6A 数据手册

 浏览型号ADSP-BF525KBCZ-6A的Datasheet PDF文件第2页浏览型号ADSP-BF525KBCZ-6A的Datasheet PDF文件第3页浏览型号ADSP-BF525KBCZ-6A的Datasheet PDF文件第4页浏览型号ADSP-BF525KBCZ-6A的Datasheet PDF文件第5页浏览型号ADSP-BF525KBCZ-6A的Datasheet PDF文件第6页浏览型号ADSP-BF525KBCZ-6A的Datasheet PDF文件第7页 
Blackfin  
Embedded Processor  
ADSP-BF522/ADSP-BF523/ADSP-BF524/ADSP-BF525/ADSP-BF526/ADSP-BF527  
FEATURES  
PERIPHERALS  
Up to 600 MHz high performance Blackfin processor  
Two 16-bit MACs, two 40-bit ALUs, four 8-bit video ALUs,  
40-bit shifter  
USB 2.0 high speed on-the-go (OTG) with integrated PHY  
IEEE 802.3-compliant 10/100 Ethernet MAC  
Parallel peripheral interface (PPI), supporting ITU-R 656  
video data formats  
RISC-like register and instruction model for ease of  
programming and compiler-friendly support  
Advanced debug, trace, and performance monitoring  
Accepts a wide range of supply voltages for internal and I/O  
operations. See Specifications on Page 28  
Programmable on-chip voltage regulator (ADSP-BF523/  
ADSP-BF525/ADSP-BF527 processors only)  
Qualified for Automotive Applications. See Automotive  
Products on Page 87  
Host DMA port (HOSTDP)  
2 dual-channel, full-duplex synchronous serial ports  
(SPORTs), supporting eight stereo I2S channels  
12 peripheral DMAs, 2 mastered by the Ethernet MAC  
2 memory-to-memory DMAs with external request lines  
Event handler with 54 interrupt inputs  
Serial peripheral interface (SPI) compatible port  
2 UARTs with IrDA support  
289-ball and 208-ball CSP_BGA packages  
2-wire interface (TWI) controller  
Eight 32-bit timers/counters with PWM support  
32-bit up/down counter with rotary support  
Real-time clock (RTC) and watchdog timer  
32-bit core timer  
48 general-purpose I/Os (GPIOs), with programmable  
hysteresis  
NAND flash controller (NFC)  
Debug/JTAG interface  
On-chip PLL capable of frequency multiplication  
MEMORY  
132K bytes of on-chip memory (See Table 1 on Page 3 for L1  
and L3 memory size details)  
External memory controller with glueless support for SDRAM  
and asynchronous 8-bit and 16-bit memories  
Flexible booting options from external flash, SPI, and TWI  
memory or from host devices including SPI, TWI, and UART  
Code security with Lockbox Secure Technology  
one-time-programmable (OTP) memory  
Memory management unit providing memory protection  
WATCHDOG TIMER  
OTP MEMORY  
RTC  
VOLTAGE REGULATOR*  
JTAG TEST AND EMULATION  
COUNTER  
SPORT0  
SPORT1  
UART1  
UART0  
NFC  
PERIPHERAL  
ACCESS BUS  
INTERRUPT  
CONTROLLER  
GPIO  
PORT F  
B
L1 INSTRUCTION  
MEMORY  
L1 DATA  
MEMORY  
GPIO  
PORT G  
DMA  
CONTROLLER  
PPI  
DMA  
ACCESS  
BUS  
EAB  
16  
SPI  
DCB  
USB  
TIMER7-1  
GPIO  
PORT H  
DEB  
TIMER0  
BOOT  
ROM  
EXTERNAL PORT  
EMAC  
HOST DMA  
TWI  
FLASH, SDRAM CONTROL  
PORT J  
*REGULATOR ONLY AVAILABLE ON ADSP-BF523/ADSP-BF525/ADSP-BF527 PROCESSORS  
Figure 1. Processor Block Diagram  
Blackfin and the Blackfin logo are registered trademarks of Analog Devices, Inc.  
Rev. D Document Feedback  
Information furnished by Analog Devices is believed to be accurate and reliable.  
However, no responsibility is assumed by Analog Devices for its use, nor for any  
infringements of patents or other rights of third parties that may result from its use.  
Specifications subject to change without notice. No license is granted by implication  
or otherwise under any patent or patent rights of Analog Devices. Trademarks and  
registered trademarks are the property of their respective owners.  
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106 U.S.A.  
Tel: 781.329.4700  
Technical Support  
©2013 Analog Devices, Inc. All rights reserved.  
www.analog.com  

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