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ADRF6850BCPZ

更新时间： 2024-01-22 19:35:25

品牌	Logo	应用领域
亚德诺 - ADI		电信集成电路电信电路接收机
页数	文件大小	规格书
36页	1162K
描述
100 MHz to 1000 MHz Integrated Broadband Receiver

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ADRF6850BCPZ 技术参数

是否无铅：	含铅	是否Rohs认证：	符合
生命周期：	Active	零件包装代码：	QFN
包装说明：	HVQCCN, LCC56,.31SQ,20	针数：	56
Reach Compliance Code：	compliant	ECCN代码：	5A991.B
HTS代码：	8542.39.00.01	风险等级：	2.17
Is Samacsys：	N	JESD-30 代码：	S-XQCC-N56
JESD-609代码：	e3	长度：	8 mm
湿度敏感等级：	3	功能数量：	1
端子数量：	56	最高工作温度：	85 °C
最低工作温度：	-40 °C	封装主体材料：	UNSPECIFIED
封装代码：	HVQCCN	封装等效代码：	LCC56,.31SQ,20
封装形状：	SQUARE	封装形式：	CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE
峰值回流温度（摄氏度）：	260	电源：	3.3 V
认证状态：	Not Qualified	座面最大高度：	1 mm
子类别：	Other Telecom ICs	最大压摆率：	0.44 mA
标称供电电压：	3.3 V	表面贴装：	YES
技术：	CMOS	电信集成电路类型：	TELECOM CIRCUIT
温度等级：	INDUSTRIAL	端子面层：	Matte Tin (Sn)
端子形式：	NO LEAD	端子节距：	0.5 mm
端子位置：	QUAD	处于峰值回流温度下的最长时间：	30
宽度：	8 mm	Base Number Matches：	1

ADRF6850BCPZ 数据手册

100 MHz to 1000 MHz

Integrated Broadband Receiver

ADRF6850

FEATURES

GENERAL DESCRIPTION

IQ quadrature demodulator

Integrated fractional-N PLL and VCO

Gain control range: 60 dB

The ADRF6850 is a highly integrated broadband quadrature

demodulator, frequency synthesizer, and variable gain amplifier

(VGA). The device covers an operating frequency range from

100 MHz to 1000 MHz for use in both narrow-band and wideband

communications applications, performing quadrature demodu-

lation from IF directly to baseband frequencies.

Input frequency range: 100 MHz to 1000 MHz

Input P1dB: +12 dBm at 0 dB gain

Input IP3: +22.5 dBm at 0 dB gain

Noise figure: 11 dB at >39 dB gain, 49 dB at 0 dB gain

Baseband 1 dB bandwidth: 250 MHz in wideband mode,

50 MHz in narrow-band mode

The ADRF6850 demodulator includes a high modulus

fractional-N frequency synthesizer with integrated VCO,

providing better than 1 Hz frequency resolution, and a 60 dB

gain control range provided by a front-end VGA.

SPI/I²C serial interface

Power supply: +3.3 V/350 mA

Control of all the on-chip registers is through a user-selected

SPI interface or I²C interface. The device operates from a single

power supply ranging from 3.15 V to 3.45 V.

APPLICATIONS

Broadband communications

Cellular communications

Satellite communications

FUNCTIONAL BLOCK DIAGRAM

VCC1

VCC2

VCC3

VCC4

VCC5

VCC6

VCC7

VCC8

VCC9

LOMON

IBB

CCOMP1

CCOMP2

CCOMP3

60dB

GAIN CONTROL

RANGE

RFI

DRIVER

RFDIV

0°/90°

VCO

CORE

VTUNE

VOCM

RFCM

SEQUENCED

GAIN

INTERFACE

QBB

VGAIN

SET

REFERENCE

×2

5-BIT

DIVIDER

÷2

REFIN

DOUBLER

PHASE

CHARGE

PUMP

FREQUENCY

DETECTOR

–

LF3

CURRENT SETTING

LF2

N-COUNTER

LDET

TESTLO

THIRD-ORDER

SDI/SDA

CLK/SCL

SDO

RFCP4 RFCP3 RFCP2 RFCP1

FRACTIONAL

SPI/

INTERPOLATOR

I C

INTERFACE

FRACTIONAL

MODULUS

INTEGER

ADRF6850

GND

MUXOUT

Figure 1.

Rev. 0

Information furnished by Analog Devices is believed to be accurate and reliable. However, no

responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other

rightsof third parties that may result fromits use. Specifications subject to change without notice. No

license is granted by implication or otherwise under any patent or patent rights of Analog Devices.

Trademarks andregisteredtrademarks are the property of their respective owners.

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.

Tel: 781.329.4700

Fax: 781.461.3113

www.analog.com

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