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ADN2849SURF

更新时间： 2024-02-20 17:21:33

品牌	Logo	应用领域
亚德诺 - ADI		驱动器
页数	文件大小	规格书
17页	1043K
描述
10.7 Gbps Electro-Absorption Modulator Driver

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技术参数
数据手册

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ADN2849SURF 技术参数

是否Rohs认证：	不符合	生命周期：	Obsolete
零件包装代码：	DIE	包装说明：	2.05 X 2.05 MM, DIE-27
针数：	27	Reach Compliance Code：	compliant
风险等级：	5.92	接口集成电路类型：	INTERFACE CIRCUIT
JESD-30 代码：	S-XUUC-N27	标称负供电电压：	-5.2 V
功能数量：	1	端子数量：	27
最高工作温度：	85 °C	最低工作温度：	-40 °C
封装主体材料：	UNSPECIFIED	封装代码：	DIE
封装形状：	SQUARE	封装形式：	UNCASED CHIP
峰值回流温度（摄氏度）：	NOT SPECIFIED	认证状态：	Not Qualified
表面贴装：	YES	温度等级：	INDUSTRIAL
端子形式：	NO LEAD	端子位置：	UPPER
处于峰值回流温度下的最长时间：	NOT SPECIFIED

ADN2849SURF 数据手册

10.7 Gbps Electro-Absorption Modulator Driver

Preliminary Technical Data

ADN2849

FEATURES

Data Rates up to 10.709Gb/s

Typical Rise/Fall Time 27ps

Power Dissipation 900mW (at 2V swing, 1V offset)

Programmable Modulation Voltage up to 3V

Programmable Bias Offset Voltage up to 2V

Voltage-input control for offset, modulation

Cross Point Adjust Range 30%- 85%

Selectable Data Retiming

PRODUCT DESCRIPTION

The ADN2849 is a low power 10.7Gbps driver for electro-

absorption modulator (EAM) applications. The modulation

voltage is programmable via an external voltage up to a

maximum swing of 3V when driving 50Ω. The bias offset

voltage and output eye cross point are also programmable. On-

chip 50Ω resistor is provided for back termination of the

output. The ADN2849 is driven by AC coupled differential

CML level data and has selectable data retiming to remove jitter

from data input signal. The modulation voltage can be enabled

or disabled by driving the MOD_ENB pin with the proper logic

levels. It can operate with positive or negative (5.2V or 5.0V)

supply voltage.

PECL/CML Data & Clock Inputs

50Ω on Chip Data & Clock Terminations

Modulation Ebnable/Disable

|S₁₁|<-10dB , |S₂₂|<-8dB at 10GHz

The ADN284949 is available in a compact 4x4mm plastic

package or dice format.

Positive or negative 5.2 or 5.0V single supply operation

Available in dice and 4x4mm 24 Lead LFCSP package

APPLICATIONS

SONET OC-192 Optical Transmitters

SDH STM-64 Optical Transmitters

10Gb Ethernet IEEE802.3

XFP/X2/XENPACK/MSA-300 Optical Modules

CPAP CPAN MOD_SET

BIAS_SET

GND VTERM MODN_TERM

GND

ADN2849

Ω

DATAP

Ω

MODP

CROSS

POINT

ADJUST

DATAN

VBB

MUX

CLKP

Ω

CLKN

VEE

CLK_SELB

MOD_ENB

Figure 1. Functional Block Diagram

Rev. Pr. G August 2004

Information furnished by Analog Devices is believed to be accurate and reliable.

However, no responsibility is assumed by Analog Devices for its use, nor for any

infringements of patents or other rights of third parties that may result from its use.

Specifications subject to change without notice. No license is granted by implication

or otherwise under any patent or patent rights of Analog Devices. Trademarks and

registered trademarks are the property of their respective owners.

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.

Tel: 781.329.4700

Fax: 781.326.8703

www.analog.com

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