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ADM1487E

更新时间： 2024-01-13 10:22:17
品牌 Logo 应用领域
亚德诺 - ADI /
页数 文件大小 规格书
16页 410K
描述
5 V, 【15 kV ESD Protected Half-Duplex, RS-485/RS-422 Transceivers

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ADM1487E 技术参数

是否Rohs认证： 不符合生命周期：Obsolete
零件包装代码：SOIC包装说明：SOP, SOP8,.25
针数：8Reach Compliance Code：not_compliant
ECCN代码：EAR99HTS代码：8542.39.00.01
风险等级：5.23差分输出：YES
驱动器位数：1输入特性：DIFFERENTIAL SCHMITT TRIGGER
接口集成电路类型：LINE TRANSCEIVER接口标准：EIA-422; EIA-485
JESD-30 代码：R-PDSO-G8JESD-609代码：e0
长度：4.9 mm功能数量：1
端子数量：8最高工作温度：70 °C
最低工作温度：最小输出摆幅：1.5 V
最大输出低电流：0.004 A封装主体材料：PLASTIC/EPOXY
封装代码：SOP封装等效代码：SOP8,.25
封装形状：RECTANGULAR封装形式：SMALL OUTLINE
峰值回流温度（摄氏度）：NOT SPECIFIED电源：5 V
认证状态：Not Qualified最大接收延迟：250 ns
接收器位数：1座面最大高度：2.59 mm
子类别：Line Driver or Receivers最大压摆率：0.2 mA
最大供电电压：5.25 V最小供电电压：4.75 V
标称供电电压：5 V表面贴装：YES
技术：BICMOS温度等级：COMMERCIAL
端子面层：Tin/Lead (Sn/Pb)端子形式：GULL WING
端子节距：1.27 mm端子位置：DUAL
处于峰值回流温度下的最长时间：NOT SPECIFIED最大传输延迟：1200 ns
宽度：3.9 mmBase Number Matches：1

ADM1487E 数据手册

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5 V, ± ±5 ꢀV ꢁES ꢂProteotꢃ  
Half-Supltx, RE-485/RE-422 TPansetivtPs  
ASM485ꢁ/ASM487ꢁ/ASM±487ꢁ  
FUNCTIONAL BLOCK DIAGRAM  
FEATURES  
V
CC  
TIA/EIA RS-485-/RS-422-compliant  
ESD protection on RS-485 I/O pins  
15 kV human body model  
ADM485E/  
ADM487E/  
ADM1487E  
Data rates  
ADM487E: 250 kbps  
ADM485E/ADM1487E: 2.5 Mbps  
Half-duplex options  
RO  
RE  
R
A
B
Reduced slew rates for low EMI  
−7 V to +12 V common-mode input range  
Thermal shutdown and short-circuit protection  
8-lead SOIC packages  
DE  
DI  
D
GND  
APPLICATIONS  
Figure 1.  
Energy/power metering  
Lighting systems  
Industrial control  
Telecommunications  
Security systems  
Instrumentation  
GENERAL DESCRIPTION  
The ADM485E/ADM487E/ADM1487E are 5 V, low power  
data transceivers with 15 kV ESD protection suitable for half-  
duplex communication on multipoint bus transmission lines.  
They are designed for balanced data transmission and comply  
with Telecommunication Industry Association/Electronics Indus-  
tries Association (TIA/EIA) standards RS-485 and RS-422. The  
ADM487E and ADM1487E have a 1/4 unit load receiver input  
impedance that allows up to 128 transceivers on a bus, whereas  
the ADM485E allows up to 32 transceivers on a bus. Because  
only one driver is enabled at any time, the output of a disabled or  
power-down driver is three-stated to avoid overloading the bus.  
The driver outputs are slew rate-limited to reduce EMI and data  
errors caused by reflections from improperly terminated buses.  
Excessive power dissipation caused by bus contention or output  
shorting is prevented with a thermal shutdown circuit.  
The parts are fully specified over the industrial temperature  
ranges and are available in 8-lead SOIC packages.  
Table 1. Selection Table  
Guaranteed  
Half-/Full- Data Rate  
Part  
Number  
Slew Rate Low Power Driver/Receiver Quiescent  
Number of  
Nodes on Bus Count  
Pin  
Duplex  
(Mbps)  
Limited  
Shutdown  
Enable  
Current (μA)  
ADM485E  
ADM487E  
ADM1487E Half  
Half  
Half  
2.5  
0.25  
2.5  
No  
Yes  
No  
No  
Yes  
No  
Yes  
Yes  
Yes  
300  
120  
230  
32  
128  
128  
8
8
8
Rev. 0  
Information furnished by Analog Devices is believed to be accurate and reliable. However, no  
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other  
rights of third parties that may result from its use. Specifications subject to change without notice. No  
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.  
Trademarks and registeredtrademarks arethe property of their respective owners.  
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.  
Tel: 781.329.4700  
Fax: 781.461.3113  
www.analog.com  
©2007 Analog Devices, Inc. All rights reserved.  
 
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