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ADM1069ASTZ-REEL PDF预览

ADM1069ASTZ-REEL

更新时间: 2024-01-19 06:48:47
品牌 Logo 应用领域
亚德诺 - ADI 电源电路电源管理电路
页数 文件大小 规格书
32页 537K
描述
Super Sequencer with Margining Control

ADM1069ASTZ-REEL 技术参数

是否无铅: 含铅是否Rohs认证: 符合
生命周期:Obsolete零件包装代码:QFP
包装说明:LQFP, QFP32,.35SQ,32针数:32
Reach Compliance Code:unknownECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:5.14
可调阈值:YES模拟集成电路 - 其他类型:POWER SUPPLY SUPPORT CIRCUIT
JESD-30 代码:S-PQFP-G32JESD-609代码:e3
长度:7 mm湿度敏感等级:3
信道数量:8功能数量:1
端子数量:32最高工作温度:85 °C
最低工作温度:-40 °C封装主体材料:PLASTIC/EPOXY
封装代码:LQFP封装等效代码:QFP32,.35SQ,32
封装形状:SQUARE封装形式:FLATPACK, LOW PROFILE
峰值回流温度(摄氏度):260电源:4.75 V
认证状态:Not Qualified座面最大高度:1.6 mm
子类别:Power Management Circuits标称供电电压 (Vsup):4.75 V
表面贴装:YES温度等级:INDUSTRIAL
端子面层:Matte Tin (Sn)端子形式:GULL WING
端子节距:0.8 mm端子位置:QUAD
处于峰值回流温度下的最长时间:40宽度:7 mm
Base Number Matches:1

ADM1069ASTZ-REEL 数据手册

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Super Sequencer with Margining Control  
ADM1069  
FUNCTIONAL BLOCK DIAGRAM  
FEATURES  
REFIN REFOUT REFGND  
SDA SCL A1  
A0  
Complete supervisory and sequencing solution for up to  
8 supplies  
ADM1069  
SMBus  
INTERFACE  
VREF  
8 supply fault detectors enable supervision of supplies to  
<0.5% accuracy at all voltages at 25°C  
<1.0% accuracy across all voltages and temperatures  
4 selectable input attenuators allow supervision of supplies to  
14.4 V on VH  
12-BIT  
SAR ADC  
EEPROM  
CLOSED-LOOP  
MARGINING SYSTEM  
PDO1  
PDO2  
PDO3  
PDO4  
PDO5  
PDO6  
CONFIGURABLE  
OUTPUT  
DRIVERS  
6 V on VP1 to VP3 (VPx)  
DUAL-  
FUNCTION  
INPUTS  
VX1  
VX2  
VX3  
VX4  
4 dual-function inputs, VX1 to VX4 (VXx)  
High impedance input to supply fault detector with  
thresholds between 0.573 V and 1.375 V  
General-purpose logic input  
8 programmable driver outputs, PDO1 to PDO8 (PDOx)  
Open-collector with external pull-up  
Push/pull output, driven to VDDCAP or VPx  
Open-collector with weak pull-up to VDDCAP or VPx  
Internally charge-pumped high drive for use with external  
N-FET (PDO1 to PDO6 only)  
(LOGIC INPUTS  
OR  
(HV CAPABLE OF  
DRIVING GATES  
OF N-FET)  
SFDs)  
SEQUENCING  
ENGINE  
VP1  
VP2  
VP3  
VH  
CONFIGURABLE  
OUTPUT  
DRIVERS  
PROGRAMMABLE  
RESET  
GENERATORS  
PDO7  
PDO8  
(LV CAPABLE  
OF DRIVING  
LOGIC SIGNALS)  
(SFDs)  
AGND  
PDOGND  
VDDCAP  
VDD  
ARBITRATOR  
VOUT VOUT VOUT VOUT  
DAC  
DAC  
DAC  
DAC  
Sequencing engine (SE) implements state machine control of  
PDO outputs  
DAC1 DAC2 DAC3 DAC4  
VCCP  
GND  
Figure 1.  
State changes conditional on input events  
Enables complex control of boards  
Power-up and power-down sequence control  
Fault event handling  
Interrupt generation on warnings  
Watchdog function can be integrated in SE  
Program software control of sequencing through SMBus  
Complete voltage margining solution for 4 voltage rails  
4 voltage output 8-bit DACs (0.300 V to 1.551 V) allow voltage  
adjustment via dc-to-dc converter trim/feedback node  
12-bit ADC for readback of all supervised voltages  
Reference input (REFIN) has 2 input options  
Driven directly from 2.048 V ( 0.25%) REFOUT pin  
More accurate external reference for improved ADC  
performance  
Device powered by the highest of VPx, VH for improved  
redundancy  
User EEPROM: 256 bytes  
Industry-standard 2-wire bus interface (SMBus)  
Guaranteed PDO low with VH, VPx = 1.2 V  
Available in 32-lead, 7 mm × 7 mm LQFP and 40-lead,  
6 mm × 6 mm LFCSP packages  
APPLICATIONS  
Central office systems  
Servers/routers  
Multivoltage system line cards  
DSP/FPGA supply sequencing  
In-circuit testing of margined supplies  
GENERAL DESCRIPTION  
The ADM1069 Super Sequencer® is a configurable supervisory/  
sequencing device that offers a single-chip solution for supply  
monitoring and sequencing in multiple supply systems. In addition  
to these functions, the ADM1069 integrates a 12-bit ADC and  
four 8-bit voltage output DACs. These circuits can be used to  
implement a closed-loop margining system that enables supply  
adjustment by altering either the feedback node or reference of  
a dc-to-dc converter using the DAC outputs.  
For more information about the ADM1069 register map,  
refer to the AN-721 Application Note at www.analog.com  
Rev. C  
Information furnished by Analog Devices is believed to be accurate and reliable. However, no  
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other  
rights of third parties that may result from its use. Specifications subject to change without notice. No  
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.  
Trademarks and registeredtrademarks arethe property of their respective owners.  
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.  
Tel: 781.329.4700  
www.analog.com  
Fax: 781.461.3113 ©2005–2011 Analog Devices, Inc. All rights reserved.  
 

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