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ADM1067ACP-REEL7

更新时间： 2024-01-28 17:53:31
品牌 Logo 应用领域
亚德诺 - ADI 转换器数模转换器电源电路电源管理电路
页数 文件大小 规格书
32页 649K
描述
Super Sequencer with Open-Loop Margining DACs

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ADM1067ACP-REEL7 技术参数

是否Rohs认证： 不符合生命周期：Obsolete
零件包装代码：QFN包装说明：6 X 6 MM, MO-220VJJD-2, LFCSP-40
针数：40Reach Compliance Code：not_compliant
ECCN代码：EAR99HTS代码：8542.39.00.01
风险等级：5.89Is Samacsys：N
可调阈值：YES模拟集成电路 - 其他类型：POWER SUPPLY SUPPORT CIRCUIT
JESD-30 代码：S-XQCC-N40JESD-609代码：e0
长度：6 mm湿度敏感等级：3
信道数量：10功能数量：1
端子数量：40最高工作温度：85 °C
最低工作温度：-40 °C封装主体材料：UNSPECIFIED
封装代码：HVQCCN封装等效代码：LCC40,.24SQ,20
封装形状：SQUARE封装形式：CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE
峰值回流温度（摄氏度）：240电源：4.75 V
认证状态：Not Qualified座面最大高度：1 mm
子类别：Power Management Circuits标称供电电压 (Vsup)：4.75 V
表面贴装：YES温度等级：INDUSTRIAL
端子面层：Tin/Lead (Sn85Pb15)端子形式：NO LEAD
端子节距：0.5 mm端子位置：QUAD
处于峰值回流温度下的最长时间：30宽度：6 mm
Base Number Matches：1

ADM1067ACP-REEL7 数据手册

 浏览型号ADM1067ACP-REEL7的Datasheet PDF文件第2页浏览型号ADM1067ACP-REEL7的Datasheet PDF文件第3页浏览型号ADM1067ACP-REEL7的Datasheet PDF文件第4页浏览型号ADM1067ACP-REEL7的Datasheet PDF文件第5页浏览型号ADM1067ACP-REEL7的Datasheet PDF文件第6页浏览型号ADM1067ACP-REEL7的Datasheet PDF文件第7页 
Super Sequencer® with  
Open-Loop Margining DACs  
ADM1067  
FEATURES  
FUNCTIONAL BLOCK DIAGRAM  
REFOUT REFGND SDA SCL A1  
A0  
Complete supervisory and sequencing solution for up to  
10 supplies  
SMBus  
INTERFACE  
ADM1067  
VREF  
EEPROM  
10 supply fault detectors enable supervision of supplies to  
<0.5% accuracy at all voltages at 25°C  
<1.0 % accuracy across all voltages and temperatures  
5 selectable input attenuators allow supervision  
Supplies up to 14.4 V on VH  
Supplies up to 6 V on VPn (VP1 to VP4)  
5 dual-function inputs, VXn (VX1 to VX5)  
High impedance input to supply fault detector with  
thresholds between 0.573 V and 1.375 V  
General-purpose logic input  
10 programmable output drivers (PDO1 to PDO10)  
Open collector with external pull-up  
Push/pull output, driven to VDDCAP or VPn  
Open collector with weak pull-up to VDDCAP or VPn  
Internally charge-pumped high drive for use with external  
N-FET (PDO1 to PDO6 only)  
CONFIGURABLE  
OUTPUT  
DRIVERS  
VX1  
VX2  
VX3  
VX4  
VX5  
PDO1  
PDO2  
PDO3  
PDO4  
PDO5  
PDO6  
DUAL-  
FUNCTION  
INPUTS  
(HV CAPABLE  
OF DRIVING  
GATES OF  
(LOGIC INPUTS  
OR  
SFDs)  
N-CHANNEL FET)  
SEQUENCING  
ENGINE  
VP1  
VP2  
PDO7  
PDO8  
PDO9  
PDO10  
CONFIGURABLE  
OUTPUT  
DRIVERS  
PROGRAMMABLE  
RESET  
GENERATORS  
VP3  
(LV CAPABLE  
OF DRIVING  
LOGIC SIGNALS)  
VP4  
(SFDs)  
VH  
SFDGND  
GND  
VDD  
ARBITRATOR  
VDDCAP  
MUP  
VCCP  
MDN  
V
DAC  
V
V
V
V
V
OUT  
DAC  
OUT  
OUT  
OUT  
OUT  
OUT  
DAC  
DAC  
DAC  
DAC  
Sequencing engine (SE) implements state machine control of  
PDO outputs  
State changes conditional on input events  
Enables complex control of boards  
DAC1  
DAC2  
DAC3  
DAC4  
DAC5  
DAC6  
Figure 1.  
Power-up and power-down sequence control  
Fault event handling  
Interrupt generation on warnings  
Watchdog function can be integrated in SE  
Program software control of sequencing through SMBus  
Open-loop margining solution for 6 voltage rails  
6 voltage output 8-bit DACs (0.300 V to 1.551 V) allow  
voltage adjustment via dc-to-dc converter trim/feedback  
node  
APPLICATIONS  
Central office systems  
Servers/routers  
Multivoltage system line cards  
DSP/FPGA supply sequencing  
In-circuit testing of margined supplies  
GENERAL DESCRIPTION  
The ADM1067 is a configurable supervisory/sequencing device  
that offers a single-chip solution for supply monitoring and  
sequencing in multiple supply systems. In addition to these  
functions, the ADM1067 integrates six 8-bit voltage output  
DACs. These circuits can be used to implement an open-loop  
margining system, which enables supply adjustment by altering  
either the feedback node or reference of a dc-to-dc converter  
using the DAC outputs.  
Device powered by the highest of VPn, VH for improved  
redundancy  
User EEPROM: 256 bytes  
Industry-standard 2-wire bus interface (SMBus)  
Guaranteed PDO low with VH, VPn = 1.2 V  
Available in 2 packages  
40-lead, 6 mm × 6 mm LFCSP  
48-lead, 7 mm × 7 mm TQFP  
(continued on Page 3)  
For more information about the ADM1067 register map,  
refer to the AN-698 Application Note.  
Rev. B  
Information furnished by Analog Devices is believed to be accurate and reliable. However, no  
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other  
rights of third parties that may result from its use. Specifications subject to change without notice. No  
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.  
Trademarks and registeredtrademarks arethe property of their respective owners.  
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.  
Tel: 781.329.4700  
Fax: 781.461.3113  
www.analog.com  
©2006 Analog Devices, Inc. All rights reserved.  
 
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