Fractional-N/Integer-N PLL Synthesizer
ADF4150
FEATURES
GENERAL DESCRIPTION
Fractional-N synthesizer and integer-N synthesizer
Programmable divide-by-1/-2/-4/-8/-16 output
5.0 GHz RF bandwidth
3.0 V to 3.6 V power supply
1.8 V logic compatibility
Separate charge pump supply (VP) allows extended tuning
voltage in 3 V systems
Programmable dual-modulus prescaler of 4/5 or 8/9
Programmable output power level
RF output mute function
The ADF4150 allows implementation of fractional-N or
integer-N phase-locked loop (PLL) frequency synthesizers
if used with an external voltage-controlled oscillator (VCO),
loop filter, and external reference frequency.
The ADF4150 is for use with external VCO parts and is
software compatible with the ADF4350. The VCO frequency
can be divided by 1/2/4/8/16 to allow the user to generate RF
output frequencies as low as 31.25 MHz. For applications that
require isolation the RF output stage can be muted. The mute
function is both pin and software controllable.
3-wire serial interface
Control of all the on-chip registers is through a simple 3-wire
interface. The device operates with a power supply ranging
from 3.0 V to 3.6 V and can be powered down when not in use.
Analog and digital lock detect
Switched bandwidth fast-lock mode
Cycle slip reduction
The ADF4150 is available in a 4 mm × 4 mm package.
APPLICATIONS
Wireless infrastructure (W-CDMA, TD-SCDMA, WiMax, GSM,
PCS, DCS, DECT)
Test equipment
Wireless LANs, CATV equipment
Clock generation
FUNCTIONAL BLOCK DIAGRAM
SDV
AV
DV
V
R
SET
DD
DD
DD
P
MULTIPLEXER
MUXOUT
10-BIT R
COUNTER
÷2
DIVIDER
×2
REF
IN
DOUBLER
LOCK
DETECT
SW
LD
FL SWITCH
O
CLK
DATA
LE
DATA REGISTER
FUNCTION
LATCH
CHARGE
PUMP
CP
OUT
PHASE
COMPARATOR
RF
RF
+
OUT
OUTPUT
STAGE
DIVIDE-BY-1/
-2/-4/-8/-16
INTEGER
REG
FRACTION
REG
MODULUS
REG
–
OUT
PDB
RF
THIRD-ORDER
FRACTIONAL
INTERPOLATOR
RF
+
–
RF
INPUT
IN
MULTIPLEXER
RF
IN
N COUNTER
ADF4150
CE
A
CP
SD
GND
GND
GND
Figure 1.
Rev. 0
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