Fractional-N / Integer-N PLL Synthesizer
Preliminary Technical Data
ADF4150
FEATURES
GENERAL DESCRIPTION
Fractional-N synthesizer and integer-N synthesizer
Programmable divide-by-1/2/4/8 or 16 output
3.0 V to 3.6 V power supply
The ADF4150 allows implementation of fractional-N or
integer-N phase-locked loop (PLL) frequency synthesizers if
used with an external Voltage Controlled Oscillator (VCO),
loop filter and external reference frequency.
1.8 V logic compatibility
Separate charge pump supply (V
voltage in 3 V systems
P
) allows extended tuning
The ADF4150 is for use with external VCO parts and is
software compatible with the ADF4350. The VCO frequency
can be divided-by 1/2/4/8 or 16 to allow the user to generate RF
output frequencies as low as 31.25 MHz. For applications that
require isolation the RF output stage can be muted. The mute
function is both pin and software controllable.
Programmable dual-modulus prescaler of 4/5 or 8/9
Programmable output power level
RF output mute function
3-wire serial interface
Analog and digital lock detect
Switched bandwidth fast-lock mode
Cycle slip reduction
Control of all the on-chip registers is through a simple 3-wire
interface. The device operates with a power supply ranging
from 3.0 V to 3.6 V and can be powered down when not in use.
APPLICATIONS
Wireless infrastructure (WCDMA, TD-SCDMA, WiMax, GSM,
PCS, DCS, DECT)
The ADF4150 is available in a 4mm x 4mm package.
Test equipment
Wireless LANs, CATV equipment
Clock Generation
FUNCTIONAL BLOCK DIAGRAM
V
SDV
AV
DV
R
DD
DD
DD
P
SET
ADF4150
MUXOUT
SW
MULTIPLEXER
10-BIT R
COUNTER
÷2
DIVIDER
×2
REF
IN
DOUBLER
FL SWITCH
O
LOCK
DETECT
CLK
DATA
LE
LD
DATA REGISTER
FUNCTION
LATCH
CHARGE
PUMP
CP
OUT
PHASE
COMPARATOR
RF
RF
+
OUT
OUT
DIVIDE BY
1/2/4/8/16
OUTPUT
STAGE
INTEGER
REG
FRACTION
REG
MODULUS
REG
–
PDB
RF
THIRD-ORDER
FRACTIONAL
INTERPOLATOR
RF
RF
+
–
IN
RF
INPUT
M ULTIPLEXER
IN
N COUNTER
CE
AGND
DGND
CP
SD
GND
GND
Figure 1.
Rev. PrI
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