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AD9985KSTZ-140

更新时间： 2024-01-05 19:14:36

品牌	Logo	应用领域
亚德诺 - ADI		显示器驱动程序和接口接口集成电路
页数	文件大小	规格书
32页	349K
描述
110 MSPS/140 MSPS Analog Interface for Flat Panel Displays

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技术参数
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AD9985KSTZ-140 技术参数

是否无铅：	不含铅	是否Rohs认证：	符合
生命周期：	Obsolete	零件包装代码：	QFP
包装说明：	LEAD FREE, MS-026BEC, LQFP-80	针数：	80
Reach Compliance Code：	unknown	ECCN代码：	EAR99
HTS代码：	8542.39.00.01	风险等级：	5.34
接口集成电路类型：	INTERFACE CIRCUIT	JESD-30 代码：	S-PQFP-G80
JESD-609代码：	e3	长度：	14 mm
湿度敏感等级：	3	功能数量：	1
端子数量：	80	最高工作温度：	70 °C
最低工作温度：		封装主体材料：	PLASTIC/EPOXY
封装代码：	LQFP	封装形状：	SQUARE
封装形式：	FLATPACK, LOW PROFILE	峰值回流温度（摄氏度）：	260
认证状态：	Not Qualified	座面最大高度：	1.6 mm
最大供电电压：	3.45 V	最小供电电压：	3.15 V
标称供电电压：	3.3 V	表面贴装：	YES
技术：	CMOS	温度等级：	COMMERCIAL
端子面层：	Matte Tin (Sn)	端子形式：	GULL WING
端子节距：	0.65 mm	端子位置：	QUAD
处于峰值回流温度下的最长时间：	40	宽度：	14 mm
Base Number Matches：	1

AD9985KSTZ-140 数据手册

110 MSPS/140 MSPS Analog Interface for

Flat Panel Displays

AD9985

FUNCTIONAL BLOCK DIAGRAM

FEATURES

AUTO CLAMP

LEVEL ADJUST

Automated clamping level adjustment

140 MSPS maximum conversion rate

300 MHz analog bandwidth

0.5 V to 1.0 V analog input range

500 ps p-p PLL clock jitter at 110 MSPS

3.3 V power supply

Full sync processing

Sync detect for hot plugging

Midscale clamping

A/D

OUTA

CLAMP

AIN

AUTO CLAMP

LEVEL ADJUST

OUTA

AUTO CLAMP

LEVEL ADJUST

Power-down mode

Low power: 500 mW typical

4:2:2 output format mode

OUTA

MIDSCV

HSYNC

COAST

CLAMP

FILT

APPLICATIONS

DTACK

HSOUT

VSOUT

SOGOUT

SYNC

PROCESSING

AND CLOCK

GENERATION

RGB graphics processing

LCD monitors and projectors

Plasma display panels

Scan converters

Microdisplays

Digital TV

SOGIN

REF

BYPASS

REF

SCL

SDA

SERIAL REGISTER AND

POWER MANAGEMENT

AD9985

Figure 1.

GENERAL DESCRIPTION

to 140 MHz. PLL clock jitter is 500 ps p-p typical at 140 MSPS.

When the COAST signal is presented, the PLL maintains its

output frequency in the absence of Hsync. A sampling phase

adjustment is provided. Data, Hsync, and clock output phase

relationships are maintained. The AD9985 also offers full sync

processing for composite sync and sync-on-green applications.

The AD9985 is a complete 8-bit, 140 MSPS, monolithic analog

interface optimized for capturing RGB graphics signals from

personal computers and workstations. Its 140 MSPS encode rate

capability and full power analog bandwidth of 300 MHz

support resolutions up to SXGA (1280 × 1024 at 75 Hz).

The AD9985 includes a 140 MHz triple ADC with internal

1.25 V reference, a PLL, and programmable gain, offset, and

clamp control. The user provides only a 3.3 V power supply,

analog input, and Hsync and COAST signals. Three-state

CMOS outputs may be powered from 2.5 V to 3.3 V.

A clamp signal is generated internally or may be provided by

the user through the CLAMP input pin. This interface is fully

programmable via a 2-wire serial interface.

Fabricated in an advanced CMOS process, the AD9985 is

provided in a space-saving 80-lead LQFP surface-mount

plastic package and is specified over the –40°C to +85°C

temperature range.

The AD9985’s on-chip PLL generates a pixel clock from the

Hsync input. Pixel clock output frequencies range from 12 MHz

Rev. 0

Information furnished by Analog Devices is believed to be accurate and reliable.

However, no responsibility is assumed by Analog Devices for its use, nor for any

infringements of patents or other rights of third parties that may result from its use.

Specifications subject to change without notice. No license is granted by implication

or otherwise under any patent or patent rights of Analog Devices. Trademarks and

registered trademarks are the property of their respective owners.

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.

Tel: 781.329.4700

Fax: 781.326.8703

www.analog.com

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