AD9923A

更新时间： 2024-02-21 18:28:41

品牌	Logo	应用领域
亚德诺 - ADI		驱动器
页数	文件大小	规格书
88页	1531K
描述
CCD Signal Processor with V-Driver and Precision Timing⑩ Generator

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技术参数
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AD9923A 技术参数

是否无铅：	含铅	是否Rohs认证：	符合
生命周期：	Contact Manufacturer	零件包装代码：	BGA
包装说明：	LFBGA,	针数：	105
Reach Compliance Code：	compliant	ECCN代码：	EAR99
HTS代码：	8542.39.00.01	风险等级：	4.09
商用集成电路类型：	CONSUMER CIRCUIT	JESD-30 代码：	S-PBGA-B105
JESD-609代码：	e1	长度：	8 mm
湿度敏感等级：	3	功能数量：	1
端子数量：	105	最高工作温度：	85 °C
最低工作温度：	-25 °C	封装主体材料：	PLASTIC/EPOXY
封装代码：	LFBGA	封装形状：	SQUARE
封装形式：	GRID ARRAY, LOW PROFILE, FINE PITCH	峰值回流温度（摄氏度）：	260
认证状态：	Not Qualified	座面最大高度：	1.4 mm
最大供电电压 (Vsup)：	3.6 V	最小供电电压 (Vsup)：	2.7 V
表面贴装：	YES	温度等级：	OTHER
端子面层：	Tin/Silver/Copper (Sn96.5Ag3.0Cu0.5)	端子形式：	BALL
端子节距：	0.65 mm	端子位置：	BOTTOM
处于峰值回流温度下的最长时间：	NOT SPECIFIED	宽度：	8 mm

AD9923A 数据手册

CCD Signal Processor with V-Driver and

Precision Timing™ Generator

AD9923A

FEATURES

GENERAL DESCRIPTION

Integrated 15-channel V-driver

12-bit, 36 MHz analog-to-digital converter (ADC)

Similar register map to the AD9923

5-field, 10-phase vertical clock support

Complete on-chip timing generator

Precision Timing core with <600 ps resolution

Correlated double sampler (CDS)

The AD9923A is a complete 36 MHz front-end solution for

digital still cameras and other CCD imaging applications.

Similar to the AD9923 product, the AD9923A includes the

analog front end (AFE), a fully programmable timing generator

(TG), and a 15-channel vertical driver (V-driver). A Precision

Timing core allows adjustment of high speed clocks with

approximately 600 ps resolution at 36 MHz operation.

6 dB to 42 dB 10-bit variable gain amplifier (VGA)

Black level clamp with variable level control

On-chip 3 V horizontal and RG drivers

2-phase and 4-phase H-clock modes

Electronic and mechanical shutter support

On-chip driver for external crystal

The on-chip V-driver supports up to 15 channels for use with

5-field, 10-phase CCDs.

The analog front end includes black level clamping, CDS, VGA,

and a 12-bit ADC. The timing generator and V-driver provide

all the necessary CCD clocks: RG, H-clocks, vertical clocks, sensor

gate pulses, substrate clock, and substrate bias control. The

internal registers are programmed using a 3-wire serial

interface.

On-chip sync generator with external sync input

8 mm × 8 mm CSP_BGA package with 0.65 mm pitch

APPLICATIONS

Digital still cameras

Packaged in an 8 mm × 8 mm CSP_BGA, the AD9923A is

specified over an operating temperature range of −25°C to +85°C.

FUNCTIONAL BLOCK DIAGRAM

REFT

REFB

–3dB, 0dB, +3dB, +6dB

CDS

+6dB TO +42dB

VGA

AD9923A

VREF

12-BIT

ADC

D0 TO D11

DCLK

CCDIN

CLAMP

INTERNAL CLOCKS

HORIZONTAL

DRIVERS

H1 TO H4

PRECISION

TIMING

GENERATOR

INTERNAL

REGISTERS

SDI

SCK

XV1 TO

XV13

V1, V2, V3,

V4, V5A, V5B,

V6, V7A, V7B,

V8, V9, V10,

VERTICAL

TIMING

CONTROL

V-DRIVER

SYNC

GENERATOR

XSG1 TO

XSG8

V11, V12, V13

XSUBCK,

XSUBCNT

SUBCK

VSUB, MSHUT,

STROBE

SYNC CLI

CLO

Figure 1.

Rev. 0

Information furnished by Analog Devices is believed to be accurate and reliable. However, no

responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other

rights of third parties that may result from its use. Specifications subject to change without notice. No

license is granted by implication or otherwise under any patent or patent rights of Analog Devices.

Trademarks and registeredtrademarks arethe property of their respective owners.

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.

Tel: 781.329.4700

Fax: 781.461.3113

www.analog.com

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