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AD9822JRS PDF预览

AD9822JRS

更新时间: 2024-02-01 10:05:21
品牌 Logo 应用领域
亚德诺 - ADI /
页数 文件大小 规格书
15页 153K
描述
Complete 14-Bit CCD/CIS Signal Processor

AD9822JRS 数据手册

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Complete 14-Bit  
CCD/CIS Signal Processor  
a
AD9822  
FEATURES  
PRODUCT DESCRIPTION  
14-Bit 15 MSPS A/D Converter  
No Missing Codes Guaranteed  
3-Channel Operation Up to 15 MSPS  
1-Channel Operation Up to 12.5 MSPS  
Correlated Double Sampling  
1–6x Programmable Gain  
The AD9822 is a complete analog signal processor for CCD  
imaging applications. It features a 3-channel architecture  
designed to sample and condition the outputs of trilinear  
color CCD arrays. Each channel consists of an input clamp,  
Correlated Double Sampler (CDS), offset DAC and Pro-  
grammable Gain Amplifier (PGA), multiplexed to a high  
performance 14-bit A/D converter.  
؎350 mV Programmable Offset  
Input Clamp Circuitry  
The CDS amplifiers may be disabled for use with sensors such  
as Contact Image Sensors (CIS) and CMOS active pixel sensors,  
which do not require CDS.  
Internal Voltage Reference  
Multiplexed Byte-Wide Output (8+6 Format)  
3-Wire Serial Digital Interface  
3 V/5 V Digital I/O Compatibility  
28-Lead SOIC or SSOP  
The 14-bit digital output is multiplexed into an 8-bit output  
word that is accessed using two read cycles. The internal  
registers are programmed through a 3-wire serial interface, and  
provide adjustment of the gain, offset, and operating mode.  
Low Power CMOS: 385 mW (Typ)  
Power-Down Mode: <1 mW  
The AD9822 operates from a single 5 V power supply, typically  
consumes 385 mW of power, and is packaged in a 28-lead SOIC  
or SSOP.  
APPLICATIONS  
Flatbed Document Scanners  
Film Scanners  
Digital Color Copiers  
Multifunction Peripherals  
FUNCTIONAL BLOCK DIAGRAM  
AVDD  
AVSS  
CML  
CAPT  
CAPB  
AVDD  
AVSS  
DRVDD DRVSS  
CDS  
PGA  
VINR  
VING  
AD9822  
OEB  
BANDGAP  
9-BIT  
DAC  
REFERENCE  
14  
8
14:8  
MUX  
3:1  
MUX  
14-BIT  
ADC  
DOUT  
CDS  
CDS  
PGA  
9-BIT  
DAC  
CONFIGURATION  
REGISTER  
MUX  
REGISTER  
SCLK  
PGA  
VINB  
DIGITAL  
CONTROL  
INTERFACE  
RED  
GREEN  
BLUE  
SLOAD  
SDATA  
6
9-BIT  
DAC  
GAIN  
REGISTERS  
RED  
GREEN  
BLUE  
INPUT  
CLAMP  
BIAS  
9
OFFSET  
OFFSET  
REGISTERS  
CDSCLK1 CDSCLK2  
ADCCLK  
REV. A  
Information furnished by Analog Devices is believed to be accurate and  
reliable. However, no responsibility is assumed by Analog Devices for its  
use, nor for any infringements of patents or other rights of third parties  
which may result from its use. No license is granted by implication or  
otherwise under any patent or patent rights of Analog Devices.  
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.  
Tel: 781/329-4700  
Fax: 781/326-8703  
World Wide Web Site: http://www.analog.com  
© Analog Devices, Inc., 1999  

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