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AD9558 PDF预览

AD9558

更新时间: 2024-01-28 03:58:29
品牌 Logo 应用领域
亚德诺 - ADI /
页数 文件大小 规格书
104页 1444K
描述
Quad Input Multiservice Line Card Adaptive

AD9558 技术参数

是否无铅:含铅是否Rohs认证:符合
生命周期:Active零件包装代码:QFN
包装说明:HVQCCN,针数:64
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:2.31
Is Samacsys:N应用程序:SONET;SDH
JESD-30 代码:S-XQCC-N64JESD-609代码:e3
长度:9 mm湿度敏感等级:3
功能数量:1端子数量:64
最高工作温度:85 °C最低工作温度:-40 °C
封装主体材料:UNSPECIFIED封装代码:HVQCCN
封装形状:SQUARE封装形式:CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE
峰值回流温度(摄氏度):NOT SPECIFIED座面最大高度:1 mm
标称供电电压:1.8 V表面贴装:YES
电信集成电路类型:ATM/SONET/SDH TRANSMITTER温度等级:INDUSTRIAL
端子面层:Matte Tin (Sn)端子形式:NO LEAD
端子节距:0.5 mm端子位置:QUAD
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:9 mm
Base Number Matches:1

AD9558 数据手册

 浏览型号AD9558的Datasheet PDF文件第2页浏览型号AD9558的Datasheet PDF文件第3页浏览型号AD9558的Datasheet PDF文件第4页浏览型号AD9558的Datasheet PDF文件第5页浏览型号AD9558的Datasheet PDF文件第6页浏览型号AD9558的Datasheet PDF文件第7页 
Quad Input Multiservice Line Card Adaptive  
Clock Translator with Frame Sync  
AD9558  
Data Sheet  
Pin program function for easy frequency translation  
FEATURES  
configuration  
Supports GR-1244 Stratum 3 stability in holdover mode  
Supports smooth reference switchover with virtually  
no disturbance on output phase  
Software controlled power-down  
64-lead, 9 mm × 9 mm, LFCSP package  
Supports Telcordia GR-253 jitter generation, transfer, and  
tolerance for SONET/SDH up to OC-192 systems  
Supports ITU-T G.8262 synchronous Ethernet slave clocks  
Supports ITU-T G.823, G.824, G.825, and G.8261  
Auto/manual holdover and reference switchover  
4 reference inputs (single-ended or differential)  
Input reference frequencies: 2 kHz to 1250 MHz  
Reference validation and frequency monitoring (1 ppm)  
Programmable input reference switchover priority  
20-bit programmable input reference divider  
6 pairs of clock output pins with each pair configurable as  
a single differential LVDS/HSTL output or as 2 single-ended  
CMOS outputs  
Output frequencies: 352 Hz to 1250 MHz  
Programmable 17-bit integer and 24-bit fractional  
feedback divider in digital PLL  
Programmable digital loop filter covering loop bandwidths  
from 0.1 Hz to 5 kHz (2 kHz maximum for <0.1 dB of  
peaking)  
APPLICATIONS  
Network synchronization, including synchronous Ethernet  
and SDH to OTN mapping/demapping  
Cleanup of reference clock jitter  
SONET/SDH clocks up to OC-192, including FEC  
Stratum 3 holdover, jitter cleanup, and phase transient  
control  
Wireless base station controllers  
Cable infrastructure  
Data communications  
GENERAL DESCRIPTION  
The AD9558 is a low loop bandwidth clock multiplier that  
provides jitter cleanup and synchronization for many systems,  
including synchronous optical networks (SONET/SDH). The  
AD9558 generates an output clock synchronized to up to four  
external input references. The digital PLL allows for reduction  
of input time jitter or phase noise associated with the external  
references. The digitally controlled loop and holdover circuitry  
of the AD9558 continuously generates a low jitter output clock  
even when all reference inputs have failed.  
Low noise system clock multiplier  
Frame sync support  
Adaptive clocking  
The AD9558 operates over an industrial temperature range of  
−40°C to +85°C. If a smaller package is required, refer to the  
AD9557 for the two-input/two-output version of the same part.  
Optional crystal resonator for system clock input  
On-chip EEPROM to store multiple power-up profiles  
FUNCTIONAL BLOCK DIAGRAM  
STABLE  
SOURCE  
AD9558  
CHANNEL 0  
DIVIDER  
CLOCK  
MULTIPLIER  
CHANNEL 1  
DIVIDER  
÷3 TO ÷11  
HF DIVIDER 0  
DIGITAL  
PLL  
ANALOG  
PLL  
CHANNEL 2  
DIVIDER  
÷3 TO ÷11  
HF DIVIDER 1  
REFERENCE INPUT  
AND  
MONITOR MUX  
CHANNEL 3  
DIVIDER  
FRAME SYNC  
SERIAL INTERFACE  
STATUS AND  
CONTROL PINS  
EEPROM  
2
(SPI OR I C)  
Figure 1.  
Rev. A  
Information furnished by Analog Devices is believed to be accurate and reliable. However, no  
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other  
rights of third parties that may result from its use. Specifications subject to change without notice. No  
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.  
Trademarks and registeredtrademarks arethe property of their respective owners.  
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.  
Tel: 781.329.4700 www.analog.com  
Fax: 781.461.3113 ©2011–2012 Analog Devices, Inc. All rights reserved.  
 

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