AD9516-0

更新时间： 2024-02-17 22:27:07

品牌	Logo	应用领域
亚德诺 - ADI		时钟发生器
页数	文件大小	规格书
2页	71K
描述
14-Channel Clock Generator with Integrated 2.8 GHz VCO

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AD9516-0 技术参数

是否无铅：	不含铅	是否Rohs认证：	符合
生命周期：	Active	零件包装代码：	QFN
包装说明：	HVQCCN,	针数：	64
Reach Compliance Code：	unknown	风险等级：	5.68
系列：	9516	输入调节：	DIFFERENTIAL MUX
JESD-30 代码：	S-XQCC-N64	JESD-609代码：	e3
长度：	9 mm	逻辑集成电路类型：	PLL BASED CLOCK DRIVER
湿度敏感等级：	3	功能数量：	1
反相输出次数：		端子数量：	64
实输出次数：	10	最高工作温度：	85 °C
最低工作温度：	-40 °C	输出特性：	3-STATE
封装主体材料：	UNSPECIFIED	封装代码：	HVQCCN
封装形状：	SQUARE	封装形式：	CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE
峰值回流温度（摄氏度）：	260	传播延迟（tpd）：	2.6 ns
认证状态：	COMMERCIAL	Same Edge Skew-Max（tskwd）：	0.675 ns
座面最大高度：	1 mm	最大供电电压 (Vsup)：	3.465 V
最小供电电压 (Vsup)：	3.135 V	标称供电电压 (Vsup)：	3.3 V
表面贴装：	YES	温度等级：	INDUSTRIAL
端子面层：	MATTE TIN	端子形式：	NO LEAD
端子节距：	0.5 mm	端子位置：	QUAD
处于峰值回流温度下的最长时间：	40	宽度：	9 mm
最小 fmax：	2950 MHz	Base Number Matches：	1

AD9516-0 数据手册

14-Channel Clock Generator with

Integrated 2.8 GHz VCO

AD9516-0

Preliminary Technical Data

FEATURES

Low Broadband Jitter, < 500 Femtoseconds RMS

On-Chip 2.60 GHz – 2.95 GHz VCO

Low Phase Noise, Integer-N Frequency Synthesizer

Digital or Analog PLL Lock Detect

On-chip dividers may be set to any integer value, 1-32. In

addition, the LVDS/CMOS channels use cascaded dividers for a

maximum divide ratio of 1024. Each LVDS/CMOS channel

also offers an adjustable delay from 1.5 ns to 10 ns, programmed

as 64 steps.

Programmable Delays in R and N path

Supports Internal or External VCO

Two Reference Clock Inputs, A and B

Frequencies to 250 MHz

On-Chip Reference Clock Monitors

Auto and Manual Switchover, Holdover

Up to 14 Low Jitter Clock Drivers

The AD9516-0 is available in a 64-lead LFCSP and may be

operated from a single 3.3 V supply. If an external VCO is used,

the VCP pin may be set to a max value of 5.5V. The power

supply to the LVPECL outputs may be varied to support 2.5V or

3.3V LVPECL outputs. The AD9516-0 operates over the

standard industrial range of-40°C to +85°C.

Six LVPECL Outputs Operate to Max VCO Frequency

Four/Eight LVDS/CMOS outputs run 1 GHz/250 MHz

Programmable Dividers with Phase Offset

Programmable Delay on Four Channels

Serial Control Port

÷R

PFD

VCO

÷N

64-lead LFCSP package

APPLICATIONS

Low Jitter Clock Generation and Clock Distribution

Wired and Wireless Infrastructure

Base Stations, Optical Networks, Cable Head-Ends

Instrumentation and Imaging

Test Equipment, ATE

6 LVPECL OUTPUTS

DIVIDER

Clean Clocks for ADCs, DACs, DDSs, DDCs, DUCs, MxFEs

Clock Cleanup and Distribution for Line Cards

GENERAL DESCRIPTION

4/8 LVDS/CMOS OUTPUTS

The AD9516-0 generates up to fourteen output clocks from a

single input reference frequency. Integrated on chip is a

complete PLL with VCO, programmable dividers, adjustable

delay blocks, and multiple output logic stages. Sub-picosecond

jitter performance is maintained using on-chip 2.60 – 2.95 GHz

VCO. The AD9516 also supports the use of an external

VCO/VCXO/VCSO up to 2.4 GHz.

DELAY

DIVIDER

The AD9516-0 features six LVPECL outputs (grouped in three

pairs), which operate up to the maximum frequency of on-chip

VCO. The remaining outputs are user-programmed as either

LVDS (four max) or CMOS (eight max). The programmable

outputs operate to 1 GHz in LVDS mode and to 250MHz in

CMOS mode.

AD9516-0

Figure 1. Basic Block Diagram

Rev. prA

Information furnished by Analog Devices is believed to be accurate and reliable. However, no

responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other

rights of third parties that may result from its use. Specifications subject to change without notice. No

license is granted by implication or otherwise under any patent or patent rights of Analog Devices.

Trademarks and registeredtrademarks arethe property of their respective owners.

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.

Tel: 781.329.4700

Fax: 781.461.3113

www.analog.com

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与AD9516-0相关器件

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AD9516-0BCPZ	ADI	14-Output Clock Generator with Integrated 2.8 GHz VCO	获取价格
AD9516-0BCPZ	ROCHESTER	9516 SERIES, PLL BASED CLOCK DRIVER, 10 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), QCC64, 9 X 9	获取价格
AD9516-0BCPZ-REEL7	ADI	14-Output Clock Generator with Integrated 2.8 GHz VCO	获取价格
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