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AD8323ARUZ PDF预览

AD8323ARUZ

更新时间: 2024-02-21 15:10:13
品牌 Logo 应用领域
亚德诺 - ADI 驱动器有线电视功率控制
页数 文件大小 规格书
16页 278K
描述
IC LINE DRIVER, PDSO28, TSSOP-28, Line Driver or Receiver

AD8323ARUZ 技术参数

是否Rohs认证: 符合生命周期:Obsolete
零件包装代码:SSOP包装说明:TSSOP-28
针数:28Reach Compliance Code:unknown
风险等级:5.83差分输出:YES
驱动器位数:1输入特性:DIFFERENTIAL
接口集成电路类型:LINE DRIVERJESD-30 代码:R-PDSO-G28
JESD-609代码:e3长度:9.7 mm
湿度敏感等级:3功能数量:1
端子数量:28最高工作温度:85 °C
最低工作温度:-40 °C封装主体材料:PLASTIC/EPOXY
封装代码:TSSOP封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH峰值回流温度(摄氏度):260
座面最大高度:1.1 mm最大供电电压:5.25 V
最小供电电压:4.75 V标称供电电压:5 V
表面贴装:YES温度等级:INDUSTRIAL
端子面层:MATTE TIN端子形式:GULL WING
端子节距:0.65 mm端子位置:DUAL
处于峰值回流温度下的最长时间:40宽度:4.4 mm

AD8323ARUZ 数据手册

 浏览型号AD8323ARUZ的Datasheet PDF文件第2页浏览型号AD8323ARUZ的Datasheet PDF文件第3页浏览型号AD8323ARUZ的Datasheet PDF文件第4页浏览型号AD8323ARUZ的Datasheet PDF文件第5页浏览型号AD8323ARUZ的Datasheet PDF文件第6页浏览型号AD8323ARUZ的Datasheet PDF文件第7页 
5 V CATV Line Driver Fine Step  
Output Power Control  
a
AD8323  
FEATURES  
FUNCTIONAL BLOCK DIAGRAM  
Supports DOCSIS Standard for Reverse Path  
Transmission  
V
CC  
(7 PINS)  
BYP  
Gain Programmable in 0.75 dB Steps Over a 53.5 dB  
Range  
R1  
AD8323  
Low Distortion at 60 dBmV Output  
–56 dBc SFDR at 21 MHz  
–55 dBc SFDR at 42 MHz  
V
V
V
V
IN+  
OUT+  
DIFF OR  
SINGLE  
INPUT  
AMP  
POWER  
AMP  
ATTENUATION  
CORE  
BUFFER  
IN–  
OUT–  
Output Noise Level  
–48 dBmV in 160 kHz  
Z
DIFF =  
OUT  
75  
8
DECODE  
R2  
Maintains 75 Output Impedance  
Power-Up and Power-Down Condition  
Upper Bandwidth: 100 MHz (Full Gain Range)  
5 V Supply Operation  
Z
Z
(SINGLE) = 800⍀  
(DIFF) = 1.6k⍀  
IN  
IN  
8
POWER-DOWN  
LOGIC  
DATA LATCH  
8
SHIFT  
REGISTER  
Supports SPI Interfaces  
APPLICATIONS  
Gain-Programmable Line Driver  
HFC High-Speed Data Modems  
Interactive Set-Top Boxes  
DATEN DATA CLK GND (11 PINS)  
PD  
SLEEP  
PC Plug-in Modems  
General-Purpose Digitally Controlled Variable Gain Block  
GENERAL DESCRIPTION  
50  
55  
60  
65  
70  
The AD8323 is a low-cost, digitally controlled, variable gain ampli-  
fier optimized for coaxial line driving applications such as cable  
modems that are designed to the MCNS-DOCSIS upstream  
standard. An 8-bit serial word determines the desired output gain  
over a 53.5 dB range resulting in gain changes of 0.7526 dB/LSB.  
F
= 42MHz  
O
P
= 60dBmV @ MAX GAIN  
O
HD3  
HD2  
The AD8323 comprises a digitally controlled variable attenuator  
of 0 dB to –53.5 dB, which is preceded by a low noise, fixed  
gain buffer and is followed by a low distortion high power am-  
plifier. The AD8323 accepts a differential or single-ended input  
signal. The output is specified for driving a 75 load, such as  
coaxial cable.  
Distortion performance of –56 dBc is achieved with an output  
level up to 60 dBmV at 21 MHz bandwidth. A key performance  
and cost advantage of the AD8323 results from the ability to main-  
tain a constant 75 output impedance during power-up and  
power-down conditions. This eliminates the need for external 75 Ω  
termination, resulting in twice the effective output voltage when  
compared to a standard operational amplifier. In addition, this  
device has a sleep mode function that reduces the quiescent  
current to 4 mA.  
75  
0
8
16  
24  
32  
40  
48  
56  
64  
72  
GAIN CONTROL DEC Code  
Figure 1. Harmonic Distortion vs. Gain Control  
The AD8323 is packaged in a low-cost 28-lead TSSOP, operates  
from a single 5 V supply, and has an operational temperature  
range of –40°C to +85°C.  
REV. 0  
Information furnished by Analog Devices is believed to be accurate and  
reliable. However, no responsibility is assumed by Analog Devices for its  
use, nor for any infringements of patents or other rights of third parties  
which may result from its use. No license is granted by implication or  
otherwise under any patent or patent rights of Analog Devices.  
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.  
Tel: 781/329-4700  
Fax: 781/326-8703  
World Wide Web Site: http://www.analog.com  
© Analog Devices, Inc., 2000  

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