Complete Very High Speed
Sample-and-Hold Amplifier
a
AD783*
FUNCTIO NAL BLO CK D IAGRAM
FEATURES
Acquisition Tim e to 0.01%: 250 ns Typical
Low Pow er Dissipation: 95 m W
Low Droop Rate: 0.02 V/ s
Fully Specified and Tested Hold Mode Distortion
Total Harm onic Distortion: –85 dB
Aperture J itter: 50 ps Maxim um
Internal Hold Capacitor
1
2
3
4
8
OUT
V
CC
7
6
5
IN
COMMON
NC
S/H
NC
X1
Self-Correcting Architecture
8-Pin Mini Cerdip and SOIC Packages
AD783
V
EE
NC = NO CONNECT
P RO D UCT D ESCRIP TIO N
P RO D UCT H IGH LIGH TS
T he AD783 is a high speed, monolithic sample-and-hold
amplifier (SHA). T he AD783 offers a typical acquisition time
of 250 ns to 0.01%. T he AD783 is specified and tested for hold
mode total harmonic distortion with input frequencies up to
100 kHz. T he AD783 is configured as a unity gain amplifier
and uses a patented self-correcting architecture that minimizes
hold mode errors and ensures accuracy over temperature. T he
AD783 is self-contained and requires no external components
or adjustments.
1. Fast acquisition time (250 ns), low aperture jitter (20 ps) and
fully specified hold mode distortion make the AD783 an
ideal SHA for sampling systems.
2. Low droop (0.02 µV/µs) and internally compensated hold
mode error result in superior system accuracy.
3. Low power (95 mW typical), complete functionality and
small size make the AD783 an ideal choice for a variety of
high performance applications.
4. T he AD783 requires no external components or adjustments.
T he AD783 retains the held value with a droop rate of 0.02 µV/
µs. Excellent linearity and hold mode dc and dynamic perfor-
mance make the AD783 ideal for high speed 12- and 14-bit
analog-to-digital converters.
5. T he AD783 is an excellent choice as a front-end SHA for
high speed analog-to-digital converters such as the AD671,
AD7586, AD674B, AD774B, AD7572 and AD7672.
T he AD783 is manufactured on Analog Devices’ ABCMOS
process which merges high performance, low noise bipolar
circuitry with low power CMOS to provide an accurate, high
speed, low power SHA.
6. Fully specified and tested hold mode distortion guarantees
the performance of the SHA in sampled data systems.
T he J grade device is specified for operation from 0°C to +70°C
and the A grade from –40°C to +85°C. T he J and A grades are
available in 8-pin cerdip and SOIC packages. T he military
temperature range version is specified for operation from –55°C
to +125°C and is available in an 8-pin cerdip package. For
details refer to the Analog Devices Military Products Databook or
AD783/883B data sheet.
*P r otected by U.S. P atent Num ber 4,962,325.
REV. A
Inform ation furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assum ed by Analog Devices for its
use, nor for any infringem ents of patents or other rights of third parties
which m ay result from its use. No license is granted by im plication or
otherwise under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norw ood, MA 02062-9106, U.S.A.
Tel: 617/ 329-4700
Fax: 617/ 326-8703