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AD7274BRMZ-REEL PDF预览

AD7274BRMZ-REEL

更新时间: 2024-01-03 14:59:56
品牌 Logo 应用领域
亚德诺 - ADI 转换器光电二极管
页数 文件大小 规格书
29页 549K
描述
3 MSPS,10-/12-Bit ADCs in 8-Lead TSOT

AD7274BRMZ-REEL 数据手册

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3 MSPS,10-/12-Bit  
ADCs in 8-Lead TSOT  
AD7273/AD7274  
FUNCTIONAL BLOCK DIAGRAM  
FEATURES  
Throughput rate: 3 MSPS  
V
DD  
AGND  
Specified for VDD of 2.35 V to 3.6 V  
Power consumption  
11.4 mW at 3 MSPS with 3 V supplies  
Wide input bandwidth  
70 dB SNR at 1 MHz input frequency  
Flexible power/serial clock speed management  
No pipeline delays  
10-/12-BIT  
SUCCESSIVE  
APPROXIMATION  
ADC  
V
T/H  
IN  
V
REF  
High speed serial interface  
SCLK  
SDATA  
CS  
SPI®-/QSPI™-/MICROWIRE™-/DSP-compatible  
Temperature range: −40°C to +125°C  
Power-down mode: 0.1 μA typ  
8-lead TSOT package  
CONTROL  
LOGIC  
AD7273/AD7274  
8-lead MSOP package  
DGND  
Figure 1.  
GENERAL DESCRIPTION  
Table 1.  
Part Number  
AD72731  
AD72741  
AD7276  
The AD7273/AD7274 are 10-/12-bit, high speed, low power,  
successive approximation ADCs, respectively. The parts operate  
from a single 2.35 V to 3.6 V power supply and feature  
throughput rates of up to 3 MSPS. Each part contains a low  
noise, wide bandwidth track-and-hold amplifier that can handle  
input frequencies in excess of 55 MHz.  
Resolution  
Package  
10  
12  
12  
10  
8
8-lead MSOP  
8-lead MSOP  
8-lead MSOP  
8-lead MSOP  
8-lead MSOP  
8-Lead TSOT  
8-Lead TSOT  
6-Lead TSOT  
6-Lead TSOT  
6-Lead TSOT  
AD7277  
AD7278  
The conversion process and data acquisition are controlled  
1 Parts contain external reference pin.  
using  
and the serial clock, allowing the devices to interface  
CS  
with microprocessors or DSPs. The input signal is sampled on  
the falling edge of , and the conversion is also initiated at this  
CS  
point. The conversion rate is determined by the SCLK. There  
are no pipeline delays associated with these parts.  
PRODUCT HIGHLIGHTS  
1. 3 MSPS ADCs in an 8-lead TSOT package.  
2. High throughput with low power consumption.  
3. Flexible power/serial clock speed management.  
The AD7273/AD7274 use advanced design techniques to  
achieve very low power dissipation at high throughput rates.  
Allows maximum power efficiency at low throughput rates.  
4. Reference can be driven up to the power supply.  
5. No pipeline delay.  
The reference for the parts is applied externally and can be in  
the range of 1.4 V to VDD. This allows the widest dynamic input  
range to the ADC.  
6. The parts feature a standard successive approximation ADC  
with accurate control of the sampling instant via a  
input  
CS  
and once-off conversion control.  
Rev. 0  
Information furnished by Analog Devices is believed to be accurate and reliable. However, no  
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other  
rights of third parties that may result from its use. Specifications subject to change without notice. No  
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.  
Trademarks and registeredtrademarks arethe property of their respective owners.  
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.  
Tel: 781.329.4700  
Fax: 781.461.3113  
www.analog.com  
© 2005 Analog Devices, Inc. All rights reserved.  
 
 

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