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AD7266BCP PDF预览

AD7266BCP

更新时间: 2024-01-21 23:57:30
品牌 Logo 应用领域
亚德诺 - ADI /
页数 文件大小 规格书
17页 700K
描述
Differential Input, Dual 2 MSPS, 12-Bit, 3-Channel SAR ADC

AD7266BCP 技术参数

是否无铅: 含铅是否Rohs认证: 符合
生命周期:Active零件包装代码:QFP
包装说明:TQFP, TQFP32,.35SQ,32针数:32
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:5.4
最大模拟输入电压:5.25 V最小模拟输入电压:
最长转换时间:0.4375 µs转换器类型:ADC, SUCCESSIVE APPROXIMATION
JESD-30 代码:S-PQFP-G32JESD-609代码:e3
长度:7 mm最大线性误差 (EL):0.0366%
湿度敏感等级:3模拟输入通道数量:3
位数:12功能数量:2
端子数量:32最高工作温度:125 °C
最低工作温度:-40 °C输出位码:BINARY, 2'S COMPLEMENT BINARY
输出格式:SERIAL封装主体材料:PLASTIC/EPOXY
封装代码:TQFP封装等效代码:TQFP32,.35SQ,32
封装形状:SQUARE封装形式:FLATPACK, THIN PROFILE
峰值回流温度(摄氏度):260电源:3/5 V
认证状态:Not Qualified采样速率:2 MHz
采样并保持/跟踪并保持:TRACK座面最大高度:1.2 mm
子类别:Analog to Digital Converters标称供电电压:3 V
表面贴装:YES温度等级:AUTOMOTIVE
端子面层:Matte Tin (Sn)端子形式:GULL WING
端子节距:0.8 mm端子位置:QUAD
处于峰值回流温度下的最长时间:30宽度:7 mm

AD7266BCP 数据手册

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Differential Input, Dual 2 MSPS,  
12-Bit, 3-Channel SAR ADC  
Preliminary Technical Data  
AD7266  
FUNCTIONAL BLOCK DIAGRAM  
FEATURES  
Dual 12-bit, 3-channel ADC  
REF SELECT  
D
A
AV  
DV  
CAP  
DD  
DD  
Fast throughput rate: 2 MSPS  
Specified for VDD of 2.7 V to 5.25 V  
Low power: 12 mW max at 1.5 MSPS with 3 V supplies  
30 mW max at 2 MSPS with 5 V supplies  
Wide input bandwidth  
70 dB SNR at 100 kHz input frequency  
On-chip reference: 2.5 V  
–40°C to +125°C operation  
BUF  
T/H  
REF  
AD7266  
V
V
A1  
A2  
12-BIT  
V
V
A3  
A4  
SUCCESSIVE  
APPROXIMATION  
ADC  
OUTPUT  
DRIVERS  
MUX  
D
A
OUT  
V
V
A5  
A6  
SCLK  
CS  
Flexible power/throughput rate management  
Simultaneous conversion/read  
No pipeline delays  
High speed serial interface SPI®/QSPI™/MICROWIRE™/DSP  
compatible  
RANGE  
SGL/DIFF  
A0  
CONTROL  
LOGIC  
A1  
A2  
V
V
B1  
B2  
V
DRIVE  
V
V
Shutdown mode: 1 µA max  
32-lead LFCSP and TQFP packages  
B3  
B4  
MUX  
12-BIT  
SUCCESSIVE  
APPROXIMATION  
ADC  
OUTPUT  
DRIVERS  
D
B
T/H  
OUT  
V
V
B5  
B6  
GENERAL DESCRIPTION  
BUF  
The AD72661 is a dual, 12-bit, high speed, low power, successive  
approximation ADC that operates from a single 2.7 V to 5.25 V  
power supply and features throughput rates up to 2 MSPS. The  
device contains two ADCs, each preceded by a 3-channel multi-  
plexer, and a low noise, wide bandwidth track-and-hold amplifier  
that can handle input frequencies in excess of 10 MHz.  
AGND AGND AGND  
D
B
DGND  
DGND  
CAP  
Figure 1  
PRODUCT HIGHLIGHTS  
1. The AD7266 features two complete ADC functions that allow  
simultaneous sampling and conversion of two channels. Each  
ADC has 2 analog inputs, 3 fully differential pairs, or 6 single-  
ended channels as programmed. The conversion result of both  
channels is available simultaneously on separate data lines, or  
in succession on one data line if only one serial port is  
available.  
The conversion process and data acquisition are controlled using  
standard control inputs, allowing easy interfacing to microproces-  
CS  
sors or DSPs. The input signal is sampled on the falling edge of  
conversion is also initiated at this point. The conversion time is  
;
determined by the SCLK frequency. There are no pipelined delays  
associated with the part.  
The AD7266 uses advanced design techniques to achieve very low  
2. High Throughput with Low Power Consumption  
The AD7266 offers a 1.5 MSPS throughput rate with 8 mW  
maximum power consumption when operating at 3 V.  
power dissipation at high throughput rates. With 5 V supplies and a  
2 MSPS throughput rate, the part consumes 4 mA maximum. The  
part also offers flexible power/throughput rate management when  
operating in sleep mode.  
3. Flexible Power/Throughput Rate Management  
The conversion rate is determined by the serial clock, allowing  
power consumption to be reduced as conversion time is re-  
duced through an SCLK frequency increase. Power efficiency  
can be maximized at lower throughput rates if the part enters  
sleep between conversions.  
The analog input range for the part can be selected to be a 0 V to  
VREF range or a 2VREF range with either straight binary or twos  
complement output coding. The AD7266 has an on-chip 2.5 V  
reference that can be overdriven if an external reference is pre-  
ferred. This external reference range is 100 mV to 2.5 V. The  
AD7266 is available in 32-lead lead frame chip scale (LFCSP) and  
thin quad flat (TQFP) packages.  
4. No Pipeline Delay  
The part features two standard successive approximation  
CS  
ADCs with accurate control of the sampling instant via a  
input and once off conversion control.  
1Protected by U.S. Patent No. 6,681,332.  
Rev. PrG  
Information furnished by Analog Devices is believed to be accurate and reliable.  
However, no responsibility is assumed by Analog Devices for its use, nor for any  
infringements of patents or other rights of third parties that may result from its use.  
Specifications subject to change without notice. No license is granted by implication  
or otherwise under any patent or patent rights of Analog Devices. Trademarks and  
registered trademarks are the property of their respective owners.  
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.  
Tel: 781.329.4700  
Fax: 781.326.8703  
www.analog.com  
© 2004 Analog Devices, Inc. All rights reserved.  
 

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