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AD7194BCPZ

更新时间: 2024-02-08 03:54:20
品牌 Logo 应用领域
亚德诺 - ADI 转换器模数转换器
页数 文件大小 规格书
56页 1009K
描述
8-Channel, 4.8 kHz, Ultralow Noise, 24-Bit Sigma-Delta ADC with PGA

AD7194BCPZ 技术参数

是否无铅: 含铅是否Rohs认证: 符合
生命周期:Active零件包装代码:QFN
包装说明:HVQCCN, LCC32,.2SQ,20针数:32
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:1.72
最大模拟输入电压:5 V最小模拟输入电压:-5 V
转换器类型:ADC, DELTA-SIGMAJESD-30 代码:S-XQCC-N32
JESD-609代码:e3长度:5 mm
最大线性误差 (EL):湿度敏感等级:3
模拟输入通道数量:8位数:24
功能数量:1端子数量:32
最高工作温度:105 °C最低工作温度:-40 °C
输出位码:BINARY, OFFSET BINARY输出格式:SERIAL
封装主体材料:UNSPECIFIED封装代码:HVQCCN
封装等效代码:LCC32,.2SQ,20封装形状:SQUARE
封装形式:CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE峰值回流温度(摄氏度):260
电源:3/5,3.3/5 V认证状态:Not Qualified
采样速率:0.048 MHz座面最大高度:0.8 mm
子类别:Other Converters标称供电电压:5 V
表面贴装:YES温度等级:INDUSTRIAL
端子面层:Matte Tin (Sn)端子形式:NO LEAD
端子节距:0.5 mm端子位置:QUAD
处于峰值回流温度下的最长时间:40宽度:5 mm
Base Number Matches:1

AD7194BCPZ 数据手册

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8-Channel, 4.8 kHz, Ultralow Noise,  
24-Bit Sigma-Delta ADC with PGA  
AD7194  
Pressure measurement  
Temperature measurement  
Flow measurement  
Weigh scales  
°hromatography  
FEATURES  
Fast settling filter option  
8 differential/16 pseudo differential input channels  
RMS noise: 11 nV at 4.7 Hz (gain = 128)  
15.5 noise-free bits at 2.4 kHz (gain = 128)  
Up to 22 noise-free bits (gain = 1)  
Offset drift: 5 nV/ꢀ°  
Medical and scientific instrumentation  
GENERAL DES°RIPTION  
Gain drift: 1 ppm/ꢀ°  
The AD7194 is a low noise, complete analog front end for high  
precision measurement applications. It contains a low noise,  
24-bit sigma-delta (Σ-Δ) analog-to-digital converter (ADC).  
The on-chip low noise gain stage means that signals of small  
amplitude can interface directly to the ADC.  
Programmable gain (1 to 128)  
Output data rate: 4.7 Hz to 4.8 kHz  
Internal or external clock  
Simultaneous 50 Hz/60 Hz rejection  
4 general-purpose digital outputs  
Power supply  
AVDD: 3 V to 5.25 V  
DVDD: 2.7 V to 5.25 V  
°urrent: 4.65 mA  
Temperature range: −40ꢀ° to +105ꢀ°  
Package: 32-lead LF°SP  
The device can be configured to have eight differential inputs or  
sixteen pseudo differential inputs. The on-chip 4.92 MHz clock  
can be used as the clock source to the ADC or, alternatively, an  
external clock or crystal can be used. The output data rate from  
the part can be varied from 4.7 Hz to 4.8 kHz.  
The device has a very flexible digital filter, including a fast  
settling option. Variables such as output data rate and settling  
time are dependent on the option selected. For applications that  
require all conversions to be settled, the AD7194 includes zero  
latency.  
Interface  
3-wire serial  
SPI, QSPI™, MI°ROWIRE™, and DSP compatible  
Schmitt trigger on S°LK  
APPLI°ATIONS  
The part operates with a power supply from 3 V to 5.25 V. It  
consumes a current of 4.65 mA, and it is housed in a 32-lead  
LFCSP package.  
PL°/D°S analog input modules  
Data acquisition  
Strain gage transducers  
FUN°TIONAL BLO°K DIAGRAM  
AV  
AGND  
DV  
DGND  
REFIN1(+) REFIN1(–)  
DD  
DD  
REFERENCE  
DETECT  
AD7194  
AIN1/P3  
AIN2/P2  
AV  
DD  
AIN3/P1/REFIN2(+)  
AIN4/P0/REFIN2(–)  
DOUT/RDY  
SERIAL  
INTERFACE  
AND  
CONTROL  
LOGIC  
AIN5  
MUX  
DIN  
Σ-Δ  
ADC  
PGA  
SCLK  
CS  
AIN16  
AINCOM  
AGND  
TEMP  
CLOCK  
CIRCUITRY  
SENSOR  
MCLK1 MCLK2  
Figure 1.  
Rev. 0  
Information furnished by Analog Devices is believed to be accurate and reliable. However, no  
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other  
rights of third parties that may result from its use. Specifications subject to change without notice. No  
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.  
Trademarks and registeredtrademarks arethe property of their respective owners.  
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.  
Tel: 781.329.4700  
Fax: 781.461.3113  
www.analog.com  
©2009 Analog Devices, Inc. All rights reserved.  
 

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