AD7191

更新时间： 2024-02-05 02:25:11

品牌	Logo	应用领域
亚德诺 - ADI		传感器
页数	文件大小	规格书
20页	379K
描述
Pin-Programmable, Ultralow Noise, 24-Bit, Sigma-Delta ADC for Bridge Sensors

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AD7191 技术参数

是否无铅：	不含铅	是否Rohs认证：	符合
生命周期：	Active	零件包装代码：	TSSOP
包装说明：	TSSOP,	针数：	24
Reach Compliance Code：	unknown	风险等级：	5.77
Is Samacsys：	N	最大模拟输入电压：	5 V
最小模拟输入电压：	-5 V	转换器类型：	ADC, DELTA-SIGMA
JESD-30 代码：	R-PDSO-G24	JESD-609代码：	e3
长度：	7.8 mm	最大线性误差 (EL)：	0.001%
湿度敏感等级：	1	模拟输入通道数量：	1
位数：	24	功能数量：	1
端子数量：	24	最高工作温度：	105 °C
最低工作温度：	-40 °C	输出位码：	BINARY, OFFSET BINARY
输出格式：	SERIAL	封装主体材料：	PLASTIC/EPOXY
封装代码：	TSSOP	封装形状：	RECTANGULAR
封装形式：	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH	峰值回流温度（摄氏度）：	225
采样速率：	0.0048 MHz	座面最大高度：	1.2 mm
标称供电电压：	5 V	表面贴装：	YES
温度等级：	INDUSTRIAL	端子面层：	MATTE TIN
端子形式：	GULL WING	端子节距：	0.65 mm
端子位置：	DUAL	处于峰值回流温度下的最长时间：	NOT SPECIFIED
宽度：	4.4 mm	Base Number Matches：	1

AD7191 数据手册

Pin-Programmable, Ultralow Noise, 24-Bit,

Sigma-Delta ADC for Bridge Sensors

AD7191

FEATURES

GENERAL DESCRIPTION

Pin-programmable output rate

Output data rate: 10 Hz, 50 Hz, 60 Hz, 120 Hz

Pin-programmable PGA

The AD7191 is a low noise, complete analog front end for high

precision measurement applications. It contains a low noise,

24-bit sigma-delta (Σ-Δ) ADC. The on-chip low noise gain

stage means that signals of small amplitude can be interfaced

directly to the ADC. It contains two differential analog inputs.

The part also includes a temperature sensor that can be used for

temperature compensation.

Gain: 1, 8, 64, 128

Pin-programmable power-down and reset

RMS noise: 15 nV @ 10 Hz (gain = 128)

Up to 21.5 noise free bits (gain = 1)

Internal or external clock

For ease-of-use, all the features of the AD7191 are controlled by

dedicated pins. The on-chip PGA has a gain of 1, 8, 64, or 128,

supporting a full-scale differential input of ±± ꢀ, ±62± mꢀ,

±78 mꢀ, or ±ꢁ9 mꢀ. The output data rate can be programmed

to 10 Hz, ±0 Hz, 60 Hz, or 120 Hz. Simultaneous ±0 Hz and 60 Hz

rejection is obtained when the output data rate is set to 10 Hz

or ±0 Hz; 60 Hz only rejection is obtained when the output data

rate is set to 60 Hz. The AD7191 can be operated with the

internal clock, or an external clock can be used.

Bridge power-down switch

Offset drift: 5 nV/°C

Gain drift: 1 ppm/°C

Specified drift over time

Simultaneous 50 Hz/60 Hz rejection

Internal temperature sensor

Power supply: 3 V to 5.25 V

Current: 4.35 mA

Temperature range: –40°C to +105°C

Package: 24-lead TSSOP

The part operates with a power supply of ꢁ ꢀ to ±.2± ꢀ. It

consumes a current of 4.ꢁ± mA. It is available in a 24-lead

TSSOP package.

INTERFACE

2-wire serial

SPI, QSPI™, and MICROWIRE™ compatible

Schmitt trigger on SCLK

APPLICATIONS

Weigh scales

Strain gauge transducers

Pressure measurement

Medical and scientific instrumentation

FUNCTIONAL BLOCK DIAGRAM

AGND

DGND REFIN(+) REFIN(–)

AD7191

DOUT/RDY

SCLK

AIN1

AIN2

AIN3

AIN4

SERIAL

INTERFACE

AND CONTROL

LOGIC

Σ-Δ

ADC

PDOWN

CHAN

MUX

PGA

CLKSEL

BPDSW

PGA2

PGA1

TEMPERATURE

SENSOR

CLOCK

CIRCUITRY

MCLK1 MCLK2

ODR2 ODR1 TEMP

Figure 1.

Rev. A

Information furnished by Analog Devices is believed to be accurate and reliable. However, no

responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other

rights of third parties that may result from its use. Specifications subject to change without notice. No

license is granted by implication or otherwise under any patent or patent rights of Analog Devices.

Trademarks and registeredtrademarks arethe property of their respective owners.

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.

Tel: 781.329.4700

Fax: 781.461.3113

www.analog.com

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