CMOS
a
TIA IS-54 Baseband Receive Port
AD7013
designed to perform the baseband conversion of I and Q
waveforms in accordance with the American (TIA IS-54)
Digital Cellular Telephone system.
FEATURES
Single +5 V Supply
Receive Channel
Differential or Single-Ended Analog Inputs
Auxiliary Set of Analog I & Q Inputs
Two Sigma-Delta A/D Converters
Choice of Two Digital FIR Filters
Root-Raised-Cosine Rx Filters, α = 0.35
Brick Wall FIR Rx Filters
On-Chip or User Rx Offset Calibration
ADC Sampling Vernier
Three Auxiliary DACs
On-Chip Voltage Reference
Low Active Power Dissipation, Typical 45 mW
Low Sleep Mode Power Dissipation, <50 µW
28-Pin SSOP
The receive path consists of two high performance sigma-delta
ADCs, each followed by a FIR digital filter. A primary and
auxiliary set of IQ differential analog inputs are provided,
where either can be selected as inputs to the sigma-delta
ADCs. Also, a choice of two frequency responses are available
for the receive FIR filters; a Root-Raised-Cosine filter for
digital mode or a brick wall response for analog mode.
Differential analog inputs are provided for both I and Q
channels. On-chip calibration logic is also provided to remove
either on-chip offsets or remove system offsets. A 16-bit serial
interface is provided, interfacing easily to most DSPs. The
receive path also provides a means to vary the sampling
instant, giving a resolution to 1/32 of a symbol interval.
APPLICATIONS
The auxiliary section provides two 8-bit DACs and one 10-bit
DAC for functions such as automatic gain control (AGC),
automatic frequency control (AFC) and power amplifier
control.
American TIA Digital Cellular Telephony
American Analog Cellular Telephony
Digital Baseband Receivers
As it is a necessity for all digital mobile systems to use the
lowest possible power, the device has receive and auxiliary
power down options. The AD7013 is housed in a space
efficient 28-pin SSOP (Shrink Small Outline Package).
GENERAL DESCRIPTION
The AD7013 is a complete low power, CMOS, TIA IS-54 base-
band receive port with single +5 V power supply. The part is
FUNCTIONAL BLOCK DIAGRAM
MCLK
DGND
V
AUX DAC1
AUX DAC2
AUX DAC3
FS ADJUST
V
AGND
DD
AA
8-BIT
AUX DAC
8-BIT
AUX DAC
10-BIT
AUX DAC
FULL-SCALE
ADJUST
DxCLK
DATA IN
AGND
AGND
SERIAL
INTERFACE
LATCH
LATCH
LATCH
FRAME IN
MODE1
AD7013
1.23V
REFERENCE
FRAME OUT
BYPASS
IRx
ANALOG MODE
FIR DIGITAL FILTER
IRx
OFFSET
ADJUST
∆Σ–∆
MODULATOR
SWITCHED
CAP FILTER
ROOT RAISED COSINE
FIR DIGITAL FILTER
MUX
MUX
Rx CLK
AUX IRx
AUX IRx
QRx
RECEIVE
CHANNEL
SERIAL
Rx DATA
ANALOG MODE
FIR DIGITAL FILTER
INTERFACE
QRx
∆Σ–∆
MODULATOR
SWITCHED
CAP FILTER
OFFSET
ADJUST
Rx FRAME
AUX QRx
AUX QRx
ROOT RAISED COSINE
FIR DIGITAL FILTER
REV. A
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reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
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