Low Power Mixer/Limiter/RSSI
3 V Receiver IF Subsystem
a
AD608
T he RF and LO bandwidths both exceed 500 MHz. In a typical
IF application, the AD608 will accept the output of a 240 MHz
SAW filter and downconvert it to a nominal 10.7 MHz IF with
a conversion gain of 24 dB (ZIF = 165 Ω). T he AD608’s loga-
rithmic/limiting amplifier section handles any IF from LF to as
high as 30 MHz.
FEATURES
Mixer
–15 dBm 1 dB Com pression Point
–5 dBm IP3
24 dB Conversion Gain
>500 MHz Input Bandw idth
Logarithm ic/ Lim iting Am plifier
80 dB RSSI Range
؎3؇ Phase Stability over 80 dB Range
Low Pow er
21 m W at 3 V Pow er Consum ption
CMOS-Com patible Pow er-Dow n to 300 W typ
200 ns Enable/ Disable Tim e
T he mixer is a doubly-balanced “Gilbert-Cell” type and oper-
ates linearly for RF inputs spanning –95 dBm to –15 dBm. It
has a nominal –5 dBm third-order intercept. An onboard LO
preamplifier requires only –16 dBm of LO drive. T he mixer’s
current output drives a reverse-terminated, industry-standard
10.7 MHz 330 Ω filter.
T he nominal logarithmic scaling is such that the output is
+0.2 V for a sinusoidal input to the IF amplifier of –75 dBm
and +1.8 V at an input of +5 dBm; over this range the logarith-
mic conformance is typically ±1 dB. T he logarithmic slope is
proportional to the supply voltage. A feedback loop automati-
cally nulls the input offset of the first stage down to the sub-
microvolt level.
APPLICATIONS
PHS, GSM, TDMA, FM, or PM Receivers
Battery-Pow ered Instrum entation
Base Station RSSI Measurem ent
T he AD608’s limiter output provides a hard-limited signal out-
put at 400 mV p-p. T he voltage gain of the limiting amplifier to
this output is more than 100 dB. T ransition times are 11 ns and
the phase is stable to within ±3° at 10.7 MHz for signals from
–75 dBm to +5 dBm.
GENERAL D ESCRIP TIO N
T he AD608 provides both a low power, low distortion, low
noise mixer and a complete, monolithic logarithmic/limiting
amplifier using a “successive-detection” technique. It provides
both a high speed RSSI (Received Signal Strength Indicator)
output with 80 dB dynamic range and a hard-limited output.
T he RSSI output is from a two-pole post-demodulation low-
pass filter and provides a loadable output voltage of +0.2 V to
+1.8 V. T he AD608 operates from a single 2.7 V to 5.5 V sup-
ply at a typical power level of 21 mW at 3 V.
T he AD608 is enabled by a CMOS logic-level voltage input,
with a response time of 200 ns. When disabled, the standby
power is reduced to 300 µW within 400 ns.
T he AD608 is specified for the industrial temperature range of
–25°C to +85°C for 2.7 V to 5.5 V supplies and –40°C to +85°C
for 4.5 V to 5.5 V supplies. It comes in a 16-pin plastic SOIC.
FUNCTIO NAL BLO CK D IAGRAM
110dB LIMITER GAIN
90dB RSSI
24dB MIXER GAIN
3dB NOMINAL
INSERTION LOSS
RSSI OUTPUT
20mV/dB
0.2V TO 1.8V
RSSI
IF INPUT
7 FULL-WAVE
RECTIFIER CELLS
±6mA MAX OUTPUT
(±890mV INTO 165Ω)
11
12
14
15
–75dBm TO
≈
2
+15dBm
RFHI
5
6
2MHz
LPF
COM3
VPS2
MIXER
10.7MHz
BANDPASS
FILTER
IFHI
RF INPUT
–95 TO
MXOP
7
8
+2.7V TO 5.5V
9
≈
1
–15dBm
BPF
DRIVER
LMOP
5-STAGE IF AMPLIFIER
(16dB PER STAGE)
330Ω
LIMITER
OUTPUT
400mVp-p
330Ω
RFLO
10nF
LO
PREAMP
VMID
FINAL
LIMITER
10
13
IFLO
100nF
100Ω
MID-SUPPLY
IF BIAS
LOHI
FDBK
18nF
±50µA
BIAS
AD608
COM2
VPS1 COM1
PRUP
16
1
2
4
3
1
NOTES:
–15dBm = ±56mV MAX FOR LINEAR OPERATION
+2.7V TO
5.5V
LO INPUT
–16dBm
CMOS LOGIC
INPUT
2
39.76µV RMS TO 397.6mV RMS FOR ±1dB RSSI
ACCURACY
REV. B
Inform ation furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assum ed by Analog Devices for its
use, nor for any infringem ents of patents or other rights of third parties
which m ay result from its use. No license is granted by im plication or
otherwise under any patent or patent rights of Analog Devices.
© Analog Devices, Inc., 1996
One Technology Way, P.O. Box 9106, Norw ood, MA 02062-9106, U.S.A.
Tel: 617/ 329-4700 Fax: 617/ 326-8703
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