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AD5346BRU-REEL

更新时间: 2024-02-16 23:09:05
品牌 Logo 应用领域
亚德诺 - ADI 转换器数模转换器光电二极管
页数 文件大小 规格书
24页 1184K
描述
2.5 V to 5.5 V, Parallel Interface 2.5 V to 5.5 V, Parallel Interface

AD5346BRU-REEL 技术参数

是否无铅: 含铅是否Rohs认证: 符合
生命周期:Active零件包装代码:TSSOP
包装说明:TSSOP,针数:38
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:5.32
最大模拟输出电压:5.499 V最小模拟输出电压:0.001 V
转换器类型:D/A CONVERTER输入位码:BINARY
输入格式:PARALLEL, 8 BITSJESD-30 代码:R-PDSO-G38
JESD-609代码:e3长度:9.7 mm
最大线性误差 (EL):0.3906%湿度敏感等级:3
位数:8功能数量:1
端子数量:38最高工作温度:105 °C
最低工作温度:-40 °C封装主体材料:PLASTIC/EPOXY
封装代码:TSSOP封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH峰值回流温度(摄氏度):NOT SPECIFIED
座面最大高度:1.2 mm标称安定时间 (tstl):6 µs
标称供电电压:3 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子面层:Matte Tin (Sn)端子形式:GULL WING
端子节距:0.5 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:4.4 mm
Base Number Matches:1

AD5346BRU-REEL 数据手册

 浏览型号AD5346BRU-REEL的Datasheet PDF文件第2页浏览型号AD5346BRU-REEL的Datasheet PDF文件第3页浏览型号AD5346BRU-REEL的Datasheet PDF文件第4页浏览型号AD5346BRU-REEL的Datasheet PDF文件第5页浏览型号AD5346BRU-REEL的Datasheet PDF文件第6页浏览型号AD5346BRU-REEL的Datasheet PDF文件第7页 
2.5 V to 5.5 V, Parallel Interface  
Octal Voltage Output 8-/10-/12-Bit DACs  
AD5346/AD5347/AD5348  
GENERAL DESCRIPTION  
FEATURES  
The AD5346/AD5347/AD53481 are octal 8-, 10-, and 12-bit  
DACs, operating from a 2.5 V to 5.5 V supply. These devices  
incorporate an on-chip output buffer that can drive the output  
to both supply rails, and also allow a choice of buffered or  
unbuffered reference input.  
AD5346: octal 8-bit DAC  
AD5347: octal 10-bit DAC  
AD5348: octal 12-bit DAC  
Low power operation: 1.4 mA (max) @ 3.6 V  
Power-down to 120 nA @ 3 V, 400 nA @ 5 V  
Guaranteed monotonic by design over all codes  
Rail-to-rail output range: 0 V to VREF or 0 V to 2 × VREF  
Power-on reset to 0 V  
CS  
The AD5346/AD5347/AD5348 have a parallel interface.  
selects the device and data is loaded into the input registers on  
WR  
the rising edge of  
. A readback feature allows the internal  
LDAC  
Simultaneous update of DAC outputs via  
pin  
DAC registers to be read back through the digital port.  
CLR  
Asynchronous  
Readback  
facility  
The GAIN pin on these devices allows the output range to be  
Buffered/unbuffered reference inputs  
WR  
38-lead TSSOP/6 mm × 6 mm 40-lead LFCSP packaging  
Temperature range: –40°C to +105°C  
set at 0 V to VREF or 0 V to 2 × VREF  
Input data to the DACs is double-buffered, allowing simultane-  
LDAC  
.
20 ns  
time  
ous update of multiple DACs in a system using the  
pin.  
input is also provided, which resets the  
CLR  
An asynchronous  
APPLICATIONS  
contents of the input register and the DAC register to all zeros.  
These devices also incorporate a power-on reset circuit that  
ensures that the DAC output powers on to 0 V and remains  
there until valid data is written to the device.  
Portable battery-powered instruments  
Digital gain and offset adjustment  
Programmable voltage and current sources  
Optical networking  
Automatic test equipment  
Mobile communications  
Programmable attenuators  
Industrial process control  
All three parts are pin compatible, which allows users to select  
the amount of resolution appropriate for their application  
without redesigning their circuit board.  
FUNCTIONAL BLOCK DIAGRAM  
V
V
AB  
V
CD  
REF  
AGND DGND  
DD  
REF  
POWER-ON  
RESET  
AD5348  
BUF  
INPUT  
REGISTER  
DAC  
REGISTER  
STRING  
DAC A  
GAIN  
BUFFER  
V
A
B
OUT  
DB11  
INPUT  
REGISTER  
DAC  
REGISTER  
.
.
.
STRING  
DAC B  
BUFFER  
BUFFER  
V
OUT  
DB0  
INPUT  
REGISTER  
DAC  
REGISTER  
STRING  
DAC C  
V
C
OUT  
INTER-  
FACE  
LOGIC  
CS  
DAC  
REGISTER  
INPUT  
REGISTER  
STRING  
DAC D  
V
D
BUFFER  
BUFFER  
OUT  
RD  
DAC  
REGISTER  
INPUT  
REGISTER  
STRING  
DAC E  
V
E
F
WR  
OUT  
DAC  
REGISTER  
INPUT  
REGISTER  
STRING  
DAC F  
V
OUT  
A2  
A1  
A0  
BUFFER  
BUFFER  
BUFFER  
INPUT  
REGISTER  
DAC  
REGISTER  
STRING  
DAC G  
V
V
G
OUT  
DAC  
REGISTER  
INPUT  
REGISTER  
STRING  
DAC H  
H
OUT  
CLR  
POWER-DOWN  
LOGIC  
LDAC  
V
GH  
V
EF  
REF  
PD  
REF  
Figure 1.  
1Protected by U.S. Patent No. 5,969,657; other patents pending.  
Rev. 0  
Information furnished by Analog Devices is believed to be accurate and reliable.  
However, no responsibility is assumed by Analog Devices for its use, nor for any  
infringements of patents or other rights of third parties that may result from its use.  
Specifications subject to change without notice. No license is granted by implication  
or otherwise under any patent or patent rights of Analog Devices. Trademarks and  
registered trademarks are the property of their respective owners.  
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.  
Tel: 781.329.4700  
Fax: 781.326.8703  
www.analog.com  
© 2003 Analog Devices, Inc. All rights reserved.  

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