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AD5337

更新时间: 2024-02-02 03:46:55
品牌 Logo 应用领域
亚德诺 - ADI /
页数 文件大小 规格书
24页 928K
描述
2.5 V to 5.5 V, 250 UA, 2-Wire Interface Dual-Voltage Output, 8-/10-/12-Bit DACs

AD5337 技术参数

是否无铅: 含铅是否Rohs认证: 符合
生命周期:Active零件包装代码:TSSOP
包装说明:TSSOP, TSSOP8,.19针数:8
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:5.26
Is Samacsys:N最大模拟输出电压:5.499 V
最小模拟输出电压:0.001 V转换器类型:D/A CONVERTER
输入位码:BINARY输入格式:SERIAL
JESD-30 代码:S-PDSO-G8JESD-609代码:e3
长度:3 mm最大线性误差 (EL):0.1953%
湿度敏感等级:1位数:8
功能数量:1端子数量:8
最高工作温度:105 °C最低工作温度:-40 °C
封装主体材料:PLASTIC/EPOXY封装代码:TSSOP
封装等效代码:TSSOP8,.19封装形状:SQUARE
封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH峰值回流温度(摄氏度):260
电源:3/5 V认证状态:Not Qualified
座面最大高度:1.1 mm最大稳定时间:8 µs
标称安定时间 (tstl):6 µs子类别:Other Converters
最大压摆率:0.375 mA标称供电电压:3 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子面层:Matte Tin (Sn)
端子形式:GULL WING端子节距:0.65 mm
端子位置:DUAL处于峰值回流温度下的最长时间:30
宽度:3 mmBase Number Matches:1

AD5337 数据手册

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2.5 V to 5.5 V, 250 µA, 2-Wire Interface  
Dual-Voltage Output, 8-/10-/12-Bit DACs  
AD5337/AD5338/AD5339  
GENERAL DESCRIPTION  
FEATURES  
AD5337/AD5338/AD5339 are dual 8-, 10-, and 12-bit buffered  
voltage output DACs in an 8-lead MSOP package, which  
operate from a single 2.5 V to 5.5 V supply, consuming 250 µA  
at 3 V. On-chip output amplifiers allow rail-to-rail output swing  
with a slew rate of 0.7 V/µs. A 2-wire serial interface operates at  
clock rates up to 400 kHz. This interface is SMBus-compatible  
at VDD < 3.6 V. Multiple devices can be placed on the same bus.  
AD5337  
2 buffered 8-bit DACs in 8-lead MSOP  
AD5338, AD5338-1  
2 buffered 10-bit DACs in 8-lead MSOP  
AD5339  
2 buffered 12-bit DACs in 8-lead MSOP  
Low power operation: 250 mA @ 3 V, 300 mA @ 5 V  
2-wire (I2C®compatible) serial interface  
2.5 V to 5.5 V power supply  
Guaranteed monotonic by design over all codes  
Power-down to 80 nA @ 3 V, 200 nA @ 5 V  
3 power-down modes  
Double-buffered input logic  
Output range: 0 V to VREF  
Power-on reset to 0 V  
Simultaneous update of outputs (LDAC function)  
Software clear facility  
The references for the two DACs are derived from one reference  
pin. The outputs of all DACs may be updated simultaneously  
using the software  
function. The parts incorporate a  
LDAC  
power-on reset circuit that ensures that the DAC outputs power  
up to 0 V and remain there until a valid write to the device  
takes place. A software clear function resets all input and DAC  
registers to 0 V. A power-down feature reduces the current  
consumption of the devices to 200 nA @ 5 V (80 nA @ 3 V).  
The low power consumption of these parts in normal operation  
makes them ideally suited to portable battery-operated  
Data readback facility  
equipment. The power consumption is typically 1.5 mW at 5 V  
and 0.75 mW at 3 V, reducing to 1 µW in power-down mode.  
On-chip rail-to-rail output buffer amplifiers  
Temperature range −40°C to +105°C  
APPLICATIONS  
Portable battery-powered instruments  
Digital gain and offset adjustment  
Programmable voltage and current sources  
Programmable attenuators  
Industrial process control  
FUNCTIONAL BLOCK DIAGRAM  
V
REFIN  
DD  
LDAC  
INPUT  
REGISTER  
DAC  
REGISTER  
STRING  
DAC A  
SCL  
SDA  
V
A
BUFFER  
BUFFER  
OUT  
INTERFACE  
LOGIC  
INPUT  
REGISTER  
DAC  
REGISTER  
STRING  
DAC B  
V
B
OUT  
A0  
POWER-DOWN  
LOGIC  
POWER-ON  
RESET  
AD5337/AD5338/AD5339  
GND  
Figure 1.  
Rev. A  
Information furnished by Analog Devices is believed to be accurate and reliable.  
However, no responsibility is assumed by Analog Devices for its use, nor for any  
infringements of patents or other rights of third parties that may result from its use.  
Specifications subject to change without notice. No license is granted by implication  
or otherwise under any patent or patent rights of Analog Devices. Trademarks and  
registered trademarks are the property of their respective owners.  
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.  
Tel: 781.329.4700  
Fax: 781.326.8703  
www.analog.com  
© 2004 Analog Devices, Inc. All rights reserved.  

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