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AD5206BR50-REEL PDF预览

AD5206BR50-REEL

更新时间: 2024-01-13 03:36:58
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亚德诺 - ADI 电位器
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20页 371K
描述
4-/6-Channel Digital Potentiometers

AD5206BR50-REEL 数据手册

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4-/6-Channel  
Digital Potentiometers  
AD5204/AD5206  
FUNCTIONAL BLOCK DIAGRAMS  
FEATURES  
256 positions  
AD5204  
V
DD  
CS  
Multiple independently programmable channels  
AD5204—4-channel  
AD5206—6-channel  
A1  
W1  
B1  
CLK  
D7  
D0  
EN  
RDAC  
LATCH  
1
ADDR  
DEC  
A2  
A1  
A0  
Potentiometer replacement  
DO  
SDO  
R
Terminal resistance of 10 kΩ, 50 kΩ, 100 kΩ  
3-wire SPI-compatible serial data input  
+2.7 V to +5.5 V single-supply operation; 2.7 V dual-supply  
operation  
D7  
SER  
REG  
A4  
D7  
D0  
Power-on midscale preset  
W4  
RDAC  
LATCH  
4
DI  
D0  
SDI  
B4  
APPLICATIONS  
SHDN  
8
Mechanical potentiometer replacement  
Instrumentation: gain, offset adjustment  
Programmable voltage-to-current conversion  
Programmable filters, delays, time constants  
Line impedance matching  
V
R
SS  
POWER-ON  
PRESET  
PR  
GND  
Figure 1.  
AD5206  
V
CS  
DD  
GENERAL DESCRIPTION  
A1  
W1  
B1  
CLK  
D7  
D0  
The AD5204/AD5206 provide 4-/6-channel, 256-position  
digitally controlled variable resistor (VR) devices. These  
devices perform the same electronic adjustment function as a  
potentiometer or variable resistor. Each channel of the AD5204/  
AD5206 contains a fixed resistor with a wiper contact that taps  
the fixed resistor value at a point determined by a digital code  
loaded into the SPI-compatible serial-input register. The  
resistance between the wiper and either endpoint of the fixed  
resistor varies linearly with respect to the digital code transferred  
into the VR latch. The variable resistor offers a completely  
programmable value of resistance between the A terminal and  
the wiper or the B terminal and the wiper. The fixed A-to-B  
terminal resistance of 10 kΩ, 50 kΩ, or 100 kΩ has a nominal  
temperature coefficient of 700 ppm/°C.  
EN  
RDAC  
LATCH  
1
ADDR  
DEC  
A2  
A1  
A0  
R
D7  
SER  
REG  
A6  
W6  
B6  
D7  
D0  
RDAC  
LATCH  
6
DI  
D0  
SDI  
8
R
POWER-ON  
PRESET  
GND  
V
SS  
Figure 2.  
PR  
An optional reset ( ) pin forces all the AD5204 wipers to the  
midscale position by loading 0x80 into the VR latch.  
Each VR has its own VR latch that holds its programmed  
resistance value. These VR latches are updated from an internal  
serial-to-parallel shift register that is loaded from a standard  
3-wire serial-input digital interface. Eleven data bits make up  
the data-word clocked into the serial input register. The first  
three bits are decoded to determine which VR latch is loaded  
The AD5204/AD5206 are available in the 24-lead surface-  
mount SOIC, TSSOP, and PDIP packages. The AD5204 is also  
available in a 32-lead, 5 mm × 5 mm LFCSP package. All parts are  
guaranteed to operate over the extended industrial temperature  
range of −40°C to +85°C. For additional single-, dual-, and quad-  
channel devices, see the AD8400/AD8402/AD8403 data sheets.  
CS  
with the last eight bits of the data-word when the  
strobe is  
returned to logic high. A serial data output pin at the opposite  
end of the serial register (AD5204 only) allows simple daisy  
chaining in multiple VR applications without requiring  
additional external decoding logic.  
Rev. C  
Information furnished by Analog Devices is believed to be accurate and reliable. However, no  
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other  
rights of third parties that may result from its use. Specifications subject to change without notice. No  
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.  
Trademarks and registeredtrademarks arethe property of their respective owners.  
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.  
Tel: 781.329.4700  
www.analog.com  
Fax: 781.461.3113 ©1999–2010 Analog Devices, Inc. All rights reserved.  
 

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