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AD1996

更新时间： 2024-01-02 04:07:04
品牌 Logo 应用领域
亚德诺 - ADI 放大器功率放大器
页数 文件大小 规格书
16页 390K
描述
Class-D Audio Power Amplifier

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AD1996 技术参数

是否Rohs认证： 符合生命周期：Obsolete
Reach Compliance Code：compliant风险等级：5.84
商用集成电路类型：AUDIO AMPLIFIERJESD-30 代码：R-PDSO-G36
功能数量：2端子数量：36
最高工作温度：85 °C最低工作温度：-40 °C
封装主体材料：PLASTIC/EPOXY封装代码：SSOP
封装等效代码：SSOP36,.56封装形状：RECTANGULAR
封装形式：SMALL OUTLINE, SHRINK PITCH电源：5,12 V
认证状态：Not Qualified子类别：Audio/Video Amplifiers
最大压摆率：20 mA表面贴装：YES
技术：MOS温度等级：INDUSTRIAL
端子形式：GULL WING端子节距：0.635 mm
端子位置：DUALBase Number Matches：1

AD1996 数据手册

 浏览型号AD1996的Datasheet PDF文件第2页浏览型号AD1996的Datasheet PDF文件第3页浏览型号AD1996的Datasheet PDF文件第4页浏览型号AD1996的Datasheet PDF文件第5页浏览型号AD1996的Datasheet PDF文件第6页浏览型号AD1996的Datasheet PDF文件第7页 
Class-D Audio Power Amplifier  
Preliminary Technical Data  
AD1990/AD1992/AD1994/AD1996  
GENERAL DESCRIPTION  
FEATURES  
The AD199x is a two channel Bridge Tied Load (BTL)  
Integrated Stereo Modulator & Power Stage  
0.005% THD+N  
101.5dB Dynamic Range  
PSRR > 65 dB  
switching audio power amplifier with integrated ∑∆ modulator.  
The modulator accepts a 1Vrms input signal (maximum power)  
and generates a switching waveform to drive speakers directly.  
One of the two modulators can control both output stages  
providing twice the current for single-channel applications. A  
digital, microcontroller-compatible interface provides control of  
reset, mute and PGA gain as well as output signals for thermal  
and over-current error conditions. The output stage can operate  
from supply voltages ranging from 8V to 20V. The analog  
modulator and digital logic operate from a 5V supply.  
RDS-ON < 0.3 Ω (per transistor)  
Efficiency > 80% @ 5W/6 Ω  
EMI Optimized Modulator  
On-Off-Mute Pop Noise Suppression  
Short Circuit Protection  
Over-Temperature Protection  
Low Cost DMOS Process  
APPLICATIONS  
AD1990: 5Wx2 (10Wx1)  
AD1992: 10Wx2 (20Wx1)  
AD1994: 25Wx2 (50Wx1)  
AD1996: 40Wx2 (80Wx1)  
Flat Panel Televisions  
Automotive Amplifiers  
PC Audio Systems  
Mini Components  
62  
63  
60  
53  
50  
51  
32  
31  
LEFT CHANNEL  
RIGHT CHANNEL  
41,42  
PVDD2  
7,8  
PVDD  
PVDD2  
DRIVER  
HIGH SIDE  
43,44,45  
OUTR+  
4,5,6  
OUTL+  
DRIVER  
LOW SIDE  
LEVEL  
SHIFT  
+
DEAD  
TIME  
LEVEL  
SHIFT  
+
DEAD  
TIME  
1,2,3  
PGND1  
9,10  
PVDD1  
46,47,48  
PGND2  
39,40  
PGND2  
PVDD2  
Σ∆  
MODULATOR  
Σ∆  
MODULATOR  
PGA  
PGA  
PVDD2  
CONTROL  
CONTROL  
DRIVER  
DRIVER  
HIGH SIDE  
HIGH SIDE  
11,12,13  
OUTL-  
36,37,38  
OUTR-  
DRIVER  
DRIVER  
LOW SIDE  
LOW SIDE  
14,15,16  
PGND1  
33,34,35  
PGND2  
PGND1  
PGND2  
Ø1  
Ø2  
Ø1  
Ø2  
55  
REF_FILT  
VOLTAGE  
REFERENCE  
57  
AVDD  
MUTE/  
POP  
CONTROL  
56  
AGND  
OSCILLATOR  
MODE CONTROL LOGIC  
TEMPERATURE  
SENSE &  
OVER-CURRENT  
PROTECTION  
24,25  
DVDD  
23,26  
DGND  
27  
CLKI  
28  
CLKO  
30  
29  
19  
18  
17  
49  
22 21 20  
Figure 1. Block Diagram  
Rev. PrA – 1/20/05  
Information furnished by Analog Devices is believed to be accurate and reliable.  
However, no responsibility is assumed by Analog Devices for its use, nor for any  
infringements of patents or other rights of third parties that may result from its use.  
Specifications subject to change without notice. No license is granted by implication  
or otherwise under any patent or patent rights of Analog Devices. Trademarks and  
registered trademarks are the property of their respective companies.  
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.  
Tel: 781.329.4700  
Fax: 781.326.8703  
www.analog.com  
© 2005 Analog Devices, Inc. All rights reserved.  
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