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AD1879JD

更新时间: 2024-01-08 11:28:18
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亚德诺 - ADI 转换器模数转换器信息通信管理
页数 文件大小 规格书
16页 630K
描述
High Performance 16-/18-Bit Stereo ADCs

AD1879JD 数据手册

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High Performance  
16-/18-Bit ⌺⌬ Stereo ADCs  
a
AD1878/AD1879*  
FEATURES  
FUNCTIO NAL BLO CK D IAGRAM  
Fully Differential Dual Channel Analog Inputs  
103 dB Signal-to-Noise (AD1879 typ)  
–98 dB THD+N (AD1879 typ)  
0.001 dB Passband Ripple and 115 dB Stopband  
Attenuation  
Fifth-Order, 64 Tim es Oversam pling ⌺⌬ Modulator  
Single Stage, Linear Phase Decim ator  
256 
؋
 FS Input Clock  
LRCK  
BCK  
S0  
WCK  
1
2
3
4
5
6
7
8
9
28  
SERIAL OUTPUT  
INTERFACE  
27 DATA  
DIGITAL  
CHIP  
26  
CLOCK  
S1  
25  
24  
64/32  
SINGLE-STAGE,  
SINGLE-STAGE,  
4k-TAP  
FIR DECIMATION  
FILTER  
4k-TAP  
FIR DECIMATION  
FILTER  
DV  
DD  
RESET  
APPLICATIONS  
DGND  
NC  
23 DGND  
Digital Tape Recorders  
Professional, DCC, and DAT  
A/ V Digital Am plifiers  
CD-R  
ANALOG  
CHIP  
22 DV  
DD  
D
A
C
D
A
C
D
D
A
C
A
C
21  
20  
AV  
1
AV  
AV  
1
2
SS  
SS  
Sound Reinforcem ent  
AV  
2
SS  
DD  
DD  
19 AV  
1
AGND 10  
APD 11  
P RO D UCT O VERVIEW  
AGND  
VINL–  
VINL+  
REFL  
18  
17  
16  
15  
T he AD1879 is a two-channel, 18-bit oversampling ADC based  
on ∑∆ technology and intended primarily for digital audio appli-  
cations. T he AD1878 is identical to the 18-bit AD1879 except  
that it outputs 16-bit data words. Statements in this data sheet  
should be read as applying to both parts unless otherwise noted.  
VINR–  
VINR+  
REFR  
12  
13  
14  
VOLTAGE  
REFERENCE  
Each input channel of these ADCs is fully differential. Each  
data conversion channel consists of a fifth order one-bit noise  
shaping modulator and a digital decimation filter. An on-chip  
voltage reference provides a voltage source to both channels sta-  
ble over temperature and time. Digital output data from both  
channels is time-multiplexed to a single, flexible serial interface.  
T he AD1878/AD1879 accepts a 256 × FS input master clock.  
phase and a narrow transition band that permits the digitization  
of 20 kHz signals while preventing aliasing into the passband  
even when using a 44.1 kHz sampling frequency. Passband  
ripple is less the 0.001 dB, and stopband attenuation exceeds  
115 dB.  
Input signals are sampled at 64 × FS on switched-capacitors,  
eliminating external sample-and-hold amplifiers and minimizing  
the requirements for antialias filtering at the input. With simpli-  
fied antialiasing, linear phase can be preserved across the passband.  
The AD1878/AD1879s proprietary fifth-order differential  
switched-capacitor modulator architecture shapes the one-bit  
comparator’s quantization noise out of the audio passband. T he  
high order of the modulator randomizes the modulator output,  
reducing idle tones in the AD1878/AD1879 to very low levels.  
T he AD1878/AD1879s differential architecture provides in-  
creased dynamic range and excellent common-mode rejection  
characteristics. Because its modulator is single-bit, AD1878/  
AD1879 is inherently monotonic and has no mechanism for  
producing differential linearity errors.  
T he flexible serial output port produces data in twos-complement,  
MSB-first format. Input and output signals are to T T L and  
CMOS-compatible logic levels. T he port is configured by pin  
selections. T he AD1878/AD1879 can operate in either master  
or slave mode. Each 16-/18-bit output word of a stereo pair can  
be formatted within a 32-bit field as either right-justified, I2S-  
compatible, or at user-selected positions. T he output can also be  
truncated to 16-bits by formatting into a 16-bit field.  
T he AD1878/AD1879 consists of two integrated circuits in a  
single ceramic 28-pin DIP package. T he modulators and refer-  
ence are fabricated in a BiCMOS process; the decimator and  
output port, in a 1.0 µm CMOS process. Separating these func-  
tions reduces digital crosstalk to the analog circuitry. Analog and  
digital supply connections are separated to further isolate the  
analog circuitry from the digital supplies.  
T he digital decimation filters are single-stage, 4095-tap finite  
impulse response filters for filtering the modulator’s high fre-  
quency quantization noise and reducing the 64 × FS single-bit  
output data rate to a FS word rate. T hey provide linear  
T he AD1878/AD1879 operates from ±5 V power supplies over  
the temperature range of –25°C to +70°C.  
*P rotected by U.S. P atent Num bers 5055843, 5126653, and others pending.  
REV. 0  
Inform ation furnished by Analog Devices is believed to be accurate and  
reliable. However, no responsibility is assum ed by Analog Devices for its  
use, nor for any infringem ents of patents or other rights of third parties  
which m ay result from its use. No license is granted by im plication or  
otherwise under any patent or patent rights of Analog Devices.  
One Technology Way, P.O. Box 9106, Norw ood, MA 02062-9106, U.S.A.  
Tel: 617/ 329-4700  
Fax: 617/ 326-8703  

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