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2184 PDF预览

2184

更新时间: 2024-01-02 21:37:58
品牌 Logo 应用领域
亚德诺 - ADI 电脑
页数 文件大小 规格书
31页 215K
描述
DSP Microcomputer

2184 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Active包装说明:ROHS COMPLIANT
Reach Compliance Code:unknown风险等级:5.08
主体宽度:5.8 mm主体高度:2.47 mm
主体长度或直径:6.25 mm最大触点电流(直流):0.025 A
触点(直流)最大额定R负载:.025A@24VDC最大触点电压(直流):24 V
电气寿命:1000 Cycle(s)JESD-609代码:e4
安装特点:SURFACE MOUNT-STRAIGHT开关段数量:4
最高工作温度:85 °C最低工作温度:-55 °C
包装方法:TAPE AND REEL密封:BOTTOM SEALED; TOP TAPE SEALED
表面贴装:NO开关动作:LATCHED
开关功能:SPST开关类型:SLIDE DIP SWITCH
端子面层:GOLD端接类型:SOLDER
Base Number Matches:1

2184 数据手册

 浏览型号2184的Datasheet PDF文件第2页浏览型号2184的Datasheet PDF文件第3页浏览型号2184的Datasheet PDF文件第4页浏览型号2184的Datasheet PDF文件第5页浏览型号2184的Datasheet PDF文件第6页浏览型号2184的Datasheet PDF文件第7页 
a
DSP Microcomputer  
ADSP-2184  
FUNCTIONAL BLOCK DIAGRAM  
FEATURES  
PERFORMANCE  
25 ns Instruction Cycle Time 40 MIPS Sustained  
Performance  
Single-Cycle Instruction Execution  
Single-Cycle Context Switch  
3-Bus Architecture Allows Dual Operand Fetches in  
Every Instruction Cycle  
POWER-DOWN  
CONTROL  
FULL MEMORY  
MODE  
MEMORY  
PROGRAMMABLE  
DATA ADDRESS  
GENERATORS  
I/O  
EXTERNAL  
ADDRESS  
BUS  
PROGRAM  
SEQUENCER  
4K 
؋
 24  
PROGRAM  
MEMORY  
4K 
؋
 16  
DATA  
MEMORY  
AND  
FLAGS  
DAG 1 DAG 2  
EXTERNAL  
DATA  
BUS  
PROGRAM MEMORY ADDRESS  
DATA MEMORY ADDRESS  
BYTE DMA  
CONTROLLER  
Multifunction Instructions  
PROGRAM MEMORY DATA  
DATA MEMORY DATA  
Power-Down Mode Featuring Low CMOS Standby  
Power Dissipation with 200 Cycle Recovery from  
Power-Down Condition  
OR  
EXTERNAL  
DATA  
BUS  
ARITHMETIC UNITS  
ALU SHIFTER  
SERIAL PORTS  
SPORT 0 SPORT 1  
TIMER  
INTERNAL  
DMA  
PORT  
Low Power Dissipation in Idle Mode  
MAC  
INTEGRATION  
ADSP-2100 Family Code Compatible, with Instruction  
Set Extensions  
ADSP-2100 BASE  
ARCHITECTURE  
HOST MODE  
20K Bytes of On-Chip RAM, Configured as  
4K Words On-Chip Program Memory RAM and  
4K Words On-Chip Data Memory RAM  
Dual Purpose Program Memory for Both Instruction  
and Data Storage  
Six External Interrupts  
13 Programmable Flag Pins Provide Flexible System  
Signaling  
UART Emulation through Software SPORT Reconfiguration  
ICE-Port™ Emulator Interface Supports Debugging  
in Final Systems  
Independent ALU, Multiplier/Accumulator and Barrel  
Shifter Computational Units  
Two Independent Data Address Generators  
Powerful Program Sequencer Provides  
Zero Overhead Looping Conditional Instruction  
Execution  
Programmable 16-Bit Interval Timer with Prescaler  
100-Lead LQFP  
GENERAL DESCRIPTION  
The ADSP-2184 is a single-chip microcomputer optimized for  
digital signal processing (DSP) and other high speed numeric  
processing applications.  
The ADSP-2184 combines the ADSP-2100 family base archi-  
tecture (three computational units, data address generators and  
a program sequencer) with two serial ports, a 16-bit internal  
DMA port, a byte DMA port, a programmable timer, Flag I/O,  
extensive interrupt capabilities and on-chip program and data  
memory.  
SYSTEM INTERFACE  
16-Bit Internal DMA Port for High Speed Access to  
On-Chip Memory (Mode Selectable)  
4 MByte Byte Memory Interface for Storage of Data  
Tables and Program Overlays (Made Selectable)  
8-Bit DMA to Byte Memory for Transparent Program  
and Data Memory Transfers (Mode Selectable)  
I/O Memory Interface with 2048 Locations Supports  
Parallel Peripherals (Mode Selectable)  
Programmable Memory Strobe and Separate I/O Memory  
Space Permits “Glueless” System Design  
(Mode Selectable)  
The ADSP-2184 integrates 20K bytes of on-chip memory con-  
figured as 4K words (24-bit) of program RAM and 4K words  
(16-bit) of data RAM. Power-down circuitry is also provided to  
meet the low power needs of battery operated portable equip-  
ment. The ADSP-2184 is available in 100-lead LQFP package.  
In addition, the ADSP-2184 supports instructions that include  
bit manipulations—bit set, bit clear, bit toggle, bit test— ALU  
constants, multiplication instruction (x squared), biased round-  
ing, result free ALU operations, I/O memory transfers, and  
global interrupt masking for increased flexibility.  
Programmable Wait State Generation  
Two Double-Buffered Serial Ports with Companding  
Hardware and Automatic Data Buffering  
Automatic Booting of On-Chip Program Memory from  
Byte-Wide External Memory, e.g., EPROM, or  
Through Internal DMA Port  
Fabricated in a high speed, double metal, low power, CMOS  
process, the ADSP-2184 operates with a 25 ns instruction cycle  
time. Every instruction can execute in a single processor cycle.  
ICE-Port is a trademark of Analog Devices, Inc.  
All trademarks are the property of their respective holders.  
REV. 0  
Information furnished by Analog Devices is believed to be accurate and  
reliable. However, no responsibility is assumed by Analog Devices for its  
use, nor for any infringements of patents or other rights of third parties  
which may result from its use. No license is granted by implication or  
otherwise under any patent or patent rights of Analog Devices.  
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.  
Tel: 781/329-4700  
Fax: 781/326-8703  
World Wide Web Site: http://www.analog.com  
© Analog Devices, Inc., 1999  

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