ACTS374MS
Radiation Hardened
Octal D Flip-Flop, Three-State
April 1995
Features
Pinouts
20 LEAD CERAMIC DUAL-IN-LINE
MIL-STD-1835 DESIGNATOR CDIP2-T20, LEAD FINISH C
TOP VIEW
• 1.25 Micron Radiation Hardened SOS CMOS
• Total Dose 300K RAD (Si)
• Single Event Upset (SEU) Immunity
<1 x 10-10 Errors/Bit-Day (Typ)
• SEU LET Threshold >80 MEV-cm2/mg
1
2
3
4
5
6
7
8
9
VCC
Q7
OE
Q0
D0
D1
Q1
Q2
D2
D3
Q3
20
19
18 D7
17 D6
16 Q6
15 Q5
14 D5
13 D4
• Dose Rate Upset >1011 RAD (Si)/s, 20ns Pulse
• Latch-Up Free Under Any Conditions
• Military Temperature Range: -55oC to +125oC
• Significant Power Reduction Compared to ALSTTL Logic
• DC Operating Voltage Range: 4.5V to 5.5V
12
Q4
• Input Logic Levels
- VIL = 0.8V Max
GND 10
11 CP
20 LEAD CERAMIC FLATPACK
MIL-STD-1835 DESIGNATOR CDFP4-F20, LEAD FINISH C
TOP VIEW
- VIH = VCC/2V Min
• Input Current ≤1µA at VOL, VOH
OE
Q0
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
VCC
Q7
D7
D6
Q6
Q5
D5
D4
Q4
CP
Description
The Intersil ATCS374MS is a radiation hardened octal D-type
flip-flop with three-state outputs. The eight edge-triggered flip-
flops enter data into their registers on the low to high transition of
clock (CP). The Output Enable (OEN) controls the three-state
outputs and is independent of the register operation. When OEN
is high, the outputs will be in the high impedance state.
D0
D1
Q1
Q2
D2
D3
The ACTS374MS utilizes advanced CMOS/SOS technology to
achieve high-speed operation. This device is a member of the
radiation hardened, high-speed, CMOS/SOS Logic Family.
Q3
GND
Ordering Information
PART NUMBER
ACTS374DMSR
TEMPERATURE RANGE
SCREENING LEVEL
Intersil Class S Equivalent
Intersil Class S Equivalent
Sample
PACKAGE
o
o
-55 C to +125 C
20 Lead SBDIP
o
o
ACTS374KMSR
-55 C to +125 C
20 Lead Ceramic Flatpack
20 Lead SBDIP
o
ACTS374D/Sample
ACTS374K/Sample
ACTS374HMSR
+25 C
o
+25 C
Sample
20 Lead Ceramic Flatpack
Die
o
+25 C
Die
Truth Table
Functional Diagram
INPUTS
CP
OUTPUTS
1 OF 8
FF
OE
L
Dn
H
L
Qn
H
D
Q
D
Q
CP
OE
L
L
COMMON CONTROLS
CP
L
X
X
X
Q0
Z
H
X
H = High Level
L = Low Level
X = Immaterial
Z = High Impedance
= Transition from Low to High Level
Q0
= the level of Q before the indicated input conditions
were established
OE
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
Spec Number 518828
File Number 3998
1-888-INTERSIL or 321-724-7143 | Copyright © Intersil Corporation 1999
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