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ACTS20KMSR

更新时间: 2024-11-19 04:03:39
品牌 Logo 应用领域
英特矽尔 - INTERSIL 触发器逻辑集成电路
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描述
Radiation Hardened Dual 4-Input NAND Gate

ACTS20KMSR 数据手册

  
ACTS20MS  
Radiation Hardened  
Dual 4-Input NAND Gate  
April 1995  
Features  
Pinouts  
14 LEAD CERAMIC DUAL-IN-LINE  
MIL-STD-1835 DESIGNATOR, CDIP2-T14, LEAD FINISH C  
TOP VIEW  
• 1.25 Micron Radiation Hardened SOS CMOS  
• Total Dose 300K RAD (Si)  
• Single Event Upset (SEU) Immunity  
<1 x 10-10 Errors/Bit-Day (Typ)  
A1  
B1  
1
2
3
4
5
6
7
14 VCC  
13 D2  
12 C2  
11 NC  
10 B2  
• SEU LET Threshold >80 MEV-cm2/mg  
NC  
C1  
• Dose Rate Upset >1011 RAD (Si)/s, 20ns Pulse  
• Latch-Up Free Under Any Conditions  
D1  
• Military Temperature Range: -55oC to +125oC  
• Significant Power Reduction Compared to ALSTTL Logic  
• DC Operating Voltage Range: 4.5V to 5.5V  
Y1  
9
8
A2  
Y2  
GND  
• Input Logic Levels  
- VIL = 0.8V Max  
14 LEAD CERAMIC FLATPACK  
MIL-STD-1835 DESIGNATOR, CDFP3-F14, LEAD FINISH C  
TOP VIEW  
- VIH = VCC/2V Min  
1
2
3
4
5
6
7
14  
13  
12  
11  
10  
9
• Input Current 1µA at VOL, VOH  
VCC  
D2  
A1  
B1  
Description  
C2  
NC  
C1  
The Intersil ACTS20MS is a radiation hardened dual 4-input  
NAND gate. A low on any input forces the output to a high logic  
state.  
NC  
B2  
D1  
Y1  
A2  
The ACTS20MS utilizes advanced CMOS/SOS technology to  
achieve high-speed operation. This device is a member of the  
radiation hardened, high-speed, CMOS/SOS Logic Family.  
Y2  
GND  
8
Ordering Information  
PART NUMBER  
ACTS20DMSR  
TEMPERATURE RANGE  
SCREENING LEVEL  
Intersil Class S Equivalent  
Intersil Class S Equivalent  
Sample  
PACKAGE  
o
o
-55 C to +125 C  
14 Lead SBDIP  
o
o
ACTS20KMSR  
-55 C to +125 C  
14 Lead Ceramic Flatpack  
14 Lead SBDIP  
o
ACTS20D/Sample  
ACTS20K/Sample  
ACTS20HMSR  
+25 C  
o
+25 C  
Sample  
14 Lead Ceramic Flatpack  
Die  
o
+25 C  
Die  
Truth Table  
Functional Diagram  
(1, 9)  
An  
INPUTS  
OUTPUT  
An  
L
Bn  
Cn  
X
Dn  
Yn  
H
H
H
H
L
Bn  
(2, 10)  
X
L
X
X
X
L
(6, 8)  
Yn  
X
X
(4, 12)  
Cn  
X
X
X
H
L
X
X
Dn  
(5, 13)  
H
H
H
NOTE: L = Logic Level Low, H = Logic level High, X = Don’t Care  
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.  
Spec Number 518824  
File Number 3611  
http://www.intersil.com or 407-727-9207 | Copyright © Intersil Corporation 1999  
1

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