ACTS125MS
Radiation Hardened
Quad Buffer, Three-State
January 1996
Features
Pinouts
14 PIN CERAMIC DUAL-IN-LINE
MIL-STD-1835 DESIGNATOR, CDIP2-T14,
• Devices QML Qualified in Accordance with MIL-PRF-38535
• Detailed Electrical and Screening Requirements are Contained in
SMD# 5962-96715 and Intersil’ QM Plan
LEAD FINISH C
TOP VIEW
• 1.25 Micron Radiation Hardened SOS CMOS
OE1
A1
1
14 VCC
13 OE4
12 A4
• Total Dose . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . >300K RAD (Si)
2
3
4
5
6
7
• Single Event Upset (SEU) Immunity: <1 x 10-10 Errors/Bit/Day
(Typ)
Y1
OE2
A2
11 Y4
• SEU LET Threshold . . . . . . . . . . . . . . . . . . . . . . . >100 MEV-cm2/mg
• Dose Rate Upset . . . . . . . . . . . . . . . . >1011 RAD (Si)/s, 20ns Pulse
• Dose Rate Survivabilty . . . . . . . . . . . >1012 RAD (Si)/s, 20ns Pulse
• Latch-Up Free Under Any Conditions
10 OE3
Y2
9
8
A3
Y3
GND
• Military Temperature Range . . . . . . . . . . . . . . . . . . -55oC to +125oC
• Significant Power Reduction Compared to ALSTTL Logic
• DC Operating Voltage Range . . . . . . . . . . . . . . . . . . . . 4.5V to 5.5V
14 PIN CERAMIC FLATPACK
MIL-STD-1835 DESIGNATOR, CDFP3-F14
LEAD FINISH C
TOP VIEW
• Input Logic Levels
- VIL = 0.8V Max
1
2
3
4
5
6
7
14
13
12
11
10
9
VCC
OE4
A4
OE1
A1
- VIH = VCC/2 Min
Y1
• Input Current ≤ 1µA at VOL, VOH
Y4
OE2
A2
• Fast Propagation Delay . . . . . . . . . . . . . . . . 17ns (Max), 11ns (Typ)
OE3
A3
Y2
Description
Y3
GND
8
The Intersil ACTS125MS is a Radiation Hardened Quad Buffer with
Three-State outputs. Each output has it’s own enable input, which when
“HIGH” puts the output in a high impedance state.
The ACTS125MS utilizes advanced CMOS/SOS technology to achieve
high-speed operation. This device is a member of radiation hardened,
high-speed, CMOS/SOS Logic Family.
The ACTS125MS is supplied in a 14 lead Ceramic flatpack (K suffix) or a
Ceramic Dual-In-Line Package (D suffix).
Ordering Information
PART NUMBER
5962F9671501VCC
5962F9671501VXC
ACTS125D/Sample
ACTS125K/Sample
ACTS125HMSR
TEMPERATURE RANGE
SCREENING LEVEL
PACKAGE
o
o
-55 C to +125 C
MIL-PRF-38535 Class V
14 Lead SBDIP
o
o
-55 C to +125 C
MIL-PRF-38535 Class V
14 Lead Ceramic Flatpack
14 Lead SBDIP
o
25 C
Sample
Sample
Die
o
25 C
14 Lead Ceramic Flatpack
Die
o
25 C
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
Spec Number 518826
File Number 3566.1
http://www.intersil.com or 407-727-9207 | Copyright © Intersil Corporation 1999
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