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ACTS04D/SAMPLE

更新时间: 2024-11-24 21:53:27
品牌 Logo 应用领域
英特矽尔 - INTERSIL /
页数 文件大小 规格书
3页 90K
描述
Radiation Hardened Hex Inverter

ACTS04D/SAMPLE 数据手册

 浏览型号ACTS04D/SAMPLE的Datasheet PDF文件第2页浏览型号ACTS04D/SAMPLE的Datasheet PDF文件第3页 
TM  
ACTS04MS  
Radiation Hardened  
Hex Inverter  
January 1996  
tle  
TS  
S)  
-
Features  
Pinouts  
14 PIN CERAMIC DUAL-IN-LINE MIL-STD-1835  
DESIGNATOR CDIP2-T14, LEAD FINISH C  
TOP VIEW  
• Devices QML Qualified in Accordance with MIL-PRF-38535  
• Detailed Electrical and Screening Requirements are Contained in  
SMD# 5962-96712 and Intersil’s QM Plan  
A1  
Y1  
1
2
3
4
5
6
7
14 VCC  
13 A6  
12 Y6  
11 A5  
10 Y5  
• 1.25 Micron Radiation Hardened SOS CMOS  
ia-  
d-  
• Total Dose . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . >300K RAD (Si)  
A2  
-10  
• Single Event Upset (SEU) Immunity: <1 x 10  
(Typ)  
Errors/Bit/Day  
Y2  
A3  
2
• SEU LET Threshold . . . . . . . . . . . . . . . . . . . . . . . >100 MEV-cm /mg  
rte  
Y3  
9
8
A4  
Y4  
11  
• Dose Rate Upset . . . . . . . . . . . . . . . . >10 RAD (Si)/s, 20ns Pulse  
GND  
12  
• Dose Rate Survivability. . . . . . . . . . . >10 RAD (Si)/s, 20ns Pulse  
hor  
• Latch-Up Free Under Any Conditions  
14 PIN CERAMIC FLATPACK MIL-STD-1835  
DESIGNATOR CDFP3-F14, LEAD FINISH C  
TOP VIEW  
o
o
• Military Temperature Range . . . . . . . . . . . . . . . . . . -55 C to +125 C  
• Significant Power Reduction Compared to ALSTTL Logic  
• DC Operating Voltage Range . . . . . . . . . . . . . . . . . . . . 4.5V to 5.5V  
-
ds  
r-  
A1  
Y1  
1
2
3
4
5
6
7
14  
13  
12  
11  
10  
9
VCC  
A6  
Y6  
A2  
• Input Logic Levels  
- VIL = 0.8V Max  
Y2  
A5  
Y5  
A3  
ia-  
- VIH = VCC/2 Min  
Y3  
A4  
Y4  
• Input Current 1µA at VOL, VOH  
GND  
8
d-  
,
• Fast Propagation Delay. . . . . . . . . . . . . . . . . 14ns (Max), 9ns (Typ)  
TRUTH TABLE  
Description  
INPUTS  
OUTPUTS  
An  
L
Yn  
H
The Intersil ACTS04MS is a Radiation Hardened Hex Inverter.  
d,  
L,  
l-  
The ACTS04MS utilizes advanced CMOS/SOS technology to achieve  
high-speed operation. This device is a member of radiation hardened,  
high-speed, CMOS/SOS Logic Family.  
H
L
NOTE: L = Logic Level Low, H = Logic level High  
The ACTS04MS is supplied in a 14 lead Ceramic Flatpack (K suffix) or a  
Ceramic Dual-In-Line Package (D suffix).  
,
Functional Diagram  
s
An  
Yn  
ic,  
S,  
,
Ordering Information  
PART NUMBER  
5962F9671201VCC  
5962F9671201VXC  
ACTS04D/Sample  
ACTS04K/Sample  
ACTS04HMSR  
TEMPERATURE RANGE  
-55oC to +125oC  
-55oC to +125oC  
25oC  
SCREENING LEVEL  
PACKAGE  
14 Lead SBDIP  
rte  
MIL-PRF-38535 Class V  
MIL-PRF-38535 Class V  
14 Lead Ceramic Flatpack  
14 Lead SBDIP  
Sample  
Sample  
Die  
25oC  
14 Lead Ceramic Flatpack  
Die  
25oC  
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.  
1-888-INTERSIL or 321-724-7143 | Intersil and Design is a trademark of Intersil Americas Inc.  
Spec Number 518782  
File Number 3383.1  
Copyright © Intersil Americas Inc. 2001, All Rights Reserved  
1

ACTS04D/SAMPLE 替代型号

型号 品牌 替代类型 描述 数据表
5962F9671201VCC INTERSIL

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