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ACE809LBM+H PDF预览

ACE809LBM+H

更新时间: 2022-12-19 11:07:58
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ACE 微处理器复位电路
页数 文件大小 规格书
6页 195K
描述
3-Pin Microprocessor Reset Circuits

ACE809LBM+H 数据手册

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ACE809  
Technology  
3-Pin Microprocessor Reset Circuits  
Description  
The ACE809 microprocessor supervisory circuits can be used to monitor the power supplies in  
microprocessor and digital systems. They provide s reset to the microprocessor during power-up,  
power-down and brown-out conditions.  
The function of the ACE809 is to monitor the VCC supply voltage, and assert a reset signal whenever this  
voltage declines below the factory-programmed reset threshold. The reset signal remains asserted for  
240ms after VCC rises above the threshold. The ACE809 has an active-low RESET output. The output of  
the ACE809 is guaranteed valid down to VCC =1V. The device is available in a SOT-23-3L package.  
The ACE809 is optimized to reject fast transient glitches on the VCC line. Low supply current of 25µA,  
(VCC=3.3V) makes these devices suitable for battery powered applications.  
Features  
Precision Vcc Monitor for 3.0V,3.3V and 5.0V Supplies  
140ms Guaranteed Minimum RESET Output Duration  
RESET Output Guaranteed to Vcc=1.0V  
Low 25μA Supply Current.  
Vcc Transient Immunity.  
No External Components.  
Application  
Embedded systems  
Computers  
Critical μP Power Supply Monitoring  
Battery Powered equipment  
Absolute Maximum Ratings  
Parameter  
Supply Voltage  
Output Voltage  
Input Current  
Symbol  
Max  
Unit  
V
VCC  
5.5  
RESET -0.3 to (Vcc+0.3)  
20  
V
mA  
mA  
Output Current  
Power Dissipation  
IOUT  
PD  
20  
Internally Limited  
Thermal resistance junction to ambient  
SOT-23-3  
Operating junction temperature range  
Storage temperature range  
/W  
θJA  
TJ  
230  
0 to 125  
-60 to 150  
TSTG  
Note 1: Exceeding these rating could cause damage to the device. All voltages are with respect to Ground. Currents are positive  
into, negative out of the specified terminal.  
Note 2: Voltage values are with respect to the anode terminal unless otherwise noted.  
VER 1.2  
1

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