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A8580 PDF预览

A8580

更新时间: 2024-10-29 01:19:47
品牌 Logo 应用领域
急速微 - ALLEGRO /
页数 文件大小 规格书
41页 3602K
描述
PWM/PFMn mode control input pin

A8580 数据手册

 浏览型号A8580的Datasheet PDF文件第2页浏览型号A8580的Datasheet PDF文件第3页浏览型号A8580的Datasheet PDF文件第4页浏览型号A8580的Datasheet PDF文件第5页浏览型号A8580的Datasheet PDF文件第6页浏览型号A8580的Datasheet PDF文件第7页 
A8580  
Wide Input Voltage, 2.4 MHz, 2.5 AAsynchronous Buck Regulator  
With Low-IQ Standby, Sleep Mode, External Synchronization, and NPOR Output  
Not for New Design  
This part is in production but has been determined to be NOT FOR  
NEW DESIGN. Sale of this part is currently restricted to existing  
customer programs already using the part. The part should not be  
purchased for new programs or designed into new applications.  
Samples are no longer available.  
Date of status change: September 1, 2016  
Recommended Substitutions: A8589, A8590, or A8591  
For existing customer transition, and for new customers or new appli-  
cations, contact Allegro Sales.  
NOTE: For detailed information on purchasing options, contact your  
local Allegro field applications engineer or sales representative.  
Allegro MicroSystems, LLC reserves the right to make, from time to time, revisions to the anticipated product life cycle plan  
for a product to accommodate changes in production capabilities, alternative product availabilities, or market demand. The  
information included herein is believed to be accurate and reliable. However, Allegro MicroSystems, LLC assumes no respon-  
sibility for its use; nor for any infringements of patents or other rights of third parties which may result from its use.  

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