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A6809ELWTR PDF预览

A6809ELWTR

更新时间: 2024-11-18 20:11:39
品牌 Logo 应用领域
急速微 - ALLEGRO 驱动光电二极管接口集成电路
页数 文件大小 规格书
8页 125K
描述
Vacuum Fluorescent Driver, 10-Segment, CMOS, PDSO18, SOIC-20

A6809ELWTR 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
零件包装代码:SOIC包装说明:SOP, SOP20,.4
针数:20Reach Compliance Code:unknown
ECCN代码:EAR99HTS代码:8542.39.00.01
风险等级:5.91其他特性:CAN ALSO OPERATE WITH 5V LOGIC SUPPLY
数据输入模式:SERIAL输入特性:STANDARD
接口集成电路类型:VACUUM FLUORESCENT DISPLAY DRIVERJESD-30 代码:R-PDSO-G18
JESD-609代码:e0长度:12.8 mm
复用显示功能:NO功能数量:1
区段数:10端子数量:18
最高工作温度:85 °C最低工作温度:-40 °C
输出特性:TOTEM-POLE输出极性:TRUE
封装主体材料:PLASTIC/EPOXY封装代码:SOP
封装等效代码:SOP20,.4封装形状:RECTANGULAR
封装形式:SMALL OUTLINE峰值回流温度(摄氏度):NOT SPECIFIED
电源:3.3/5 V认证状态:Not Qualified
座面最大高度:2.65 mm子类别:Display Drivers
最大压摆率:0.3 mA标称供电电压:3.3 V
电源电压1-Nom:60 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子面层:Tin/Lead (Sn/Pb)端子形式:GULL WING
端子节距:1.27 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:7.5 mm
最小 fmax:33 MHzBase Number Matches:1

A6809ELWTR 数据手册

 浏览型号A6809ELWTR的Datasheet PDF文件第2页浏览型号A6809ELWTR的Datasheet PDF文件第3页浏览型号A6809ELWTR的Datasheet PDF文件第4页浏览型号A6809ELWTR的Datasheet PDF文件第5页浏览型号A6809ELWTR的Datasheet PDF文件第6页浏览型号A6809ELWTR的Datasheet PDF文件第7页 
6809 AND  
6810  
DABiC-IV, 10-BIT SERIAL-INPUT,  
The A6809ELW and A6809SLW are last-time buy.  
LATCHED SOURCE DRIVERS  
Orders accepted until October 19, 2001.  
The A6809– and A6810– devices combine 10-bit CMOS shift  
registers, accompanying data latches and control circuitry with bipolar  
sourcing outputs and pnp active pull downs. Designed primarily to  
drive vacuum-fluorescent displays, the 60 V and -40 mA output ratings  
also allow these devices to be used in many other peripheral power  
driver applications. The A6809– and A6810– feature an increased data  
input rate (compared with the older UCN/UCQ5810-F) and a con-  
trolled output slew rate. The A6809xLW and A6810xLW are identical  
except for pinout.  
A6810xA  
18 OUT  
17 OUT  
1
2
3
4
OUT  
OUT  
OUT  
9
8
7
6
10  
SERIAL  
DATA OUT  
16  
15  
14  
LATCHES  
REGISTER  
LOAD  
SUPPLY  
The CMOS shift register and latches allow direct interfacing with  
microprocessor-based systems. With a 3.3 V or 5 V logic supply,  
typical serial-data input rates are up to 33 MHz.  
CLK  
V
BB  
CLOCK  
SERIAL  
DATA IN  
GROUND  
5
6
REGISTER  
LATCHES  
LOGIC  
SUPPLY  
V
BLNK 13 BLANKING  
A CMOS serial data output permits cascade connections in applica-  
tions requiring additional drive lines. Similar devices are avail-able as  
the A6811– (12 bits), A6812– (20 bits), and A6818– (32 bits).  
DD  
12 OUT  
7
8
ST  
STROBE  
1
11 OUT  
OUT  
5
2
The A6809– and A6810– output source drivers are npn Darling-  
tons, capable of sourcing up to 40 mA. The controlled output slew rate  
reduces electromagnetic noise, which is an important consideration in  
systems that include telecommunications and/or microprocessors and  
to meet government emissions regulations. For inter-digit blanking, all  
output drivers can be disabled and all sink drivers turned on with a  
BLANKING input high. The pnp active pull-downs will sink at least  
2.5 mA.  
9
10 OUT  
OUT  
4
3
Dwg. PP-029  
All devices are available in two temperature ranges for optimum  
performance in commercial (suffix S-) or industrial (suffix E-) applica-  
tions. The A6810– is provided in three package styles for through-hole  
DIP (suffix -A), surface-mount SOIC (suffix -LW), or minimum-area  
surface-mount PLCC (suffix -EP). The A6809– is provided in the  
SOIC (suffix -LW) only. Copper lead frames, low logic-power dissi-  
pation, and low output-saturation voltages allow all devices to source  
25 mA from all outputs continuously over the maximum operating  
temperature range.  
ABSOLUTE MAXIMUM RATINGS  
at TA = 25°C  
Logic Supply Voltage, VDD ................... 7.0 V  
Driver Supply Voltage, VBB ................... 60 V  
Continuous Output Current Range,  
I
OUT ......................... -40 mA to +15 mA  
Input Voltage Range,  
VIN ....................... -0.3 V to VDD + 0.3 V  
Package Power Dissipation,  
PD ........................................ See Graph  
Operating Temperature Range, TA  
(Suffix ‘E–’) .................. -40°C to +85°C  
(Suffix ‘S–’) .................. -20°C to +85°C  
Storage Temperature Range,  
TS ............................... -55°C to +125°C  
FEATURES  
Controlled Output Slew Rate  
High-Speed Data Storage  
60 V Minimum  
Low Output-Saturation Voltages  
Low-Power CMOS Logic  
and Latches  
Output Breakdown  
High Data Input Rate  
PNP Active Pull-Downs  
Improved Replacements  
for TL4810–, UCN5810–,  
and UCQ5810–  
Caution: These CMOS devices have input  
static protection (Class 2) but are still  
susceptible to damage if exposed to  
extremely high static electrical charges.  
Complete part number includes a suffix to identify operating  
temperature range (E- or S-) and package type (-A, -EP, or -LW).  
Always order by complete part number, e.g., A6810SLW .  

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