A6801SLW

更新时间： 2024-11-19 22:26:47

品牌	Logo	应用领域
急速微 - ALLEGRO		驱动器
页数	文件大小	规格书
12页	435K
描述
DABiC-5 Latched Sink Drivers

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中文翻译

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数据手册

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A6801SLW 数据手册

A6800/A6801

DABiC-5 Latched Sink Drivers

The A6800 and A6801 latched-input BiMOS ICs merge high-current,

high-voltage outputs with CMOS logic. The CMOS input section con-

sists of 4 or 8 data (‘D’ type) latches with associated common CLEAR,

STROBE, and OUTPUT ENABLE circuitry. The power outputs are

bipolar NPN Darlingtons. This merged technology provides versatile,

ﬂexible interface. These BiMOS power interface ICs greatly beneﬁt the

simpliﬁcation of computer or microprocessor I/O. The A6800 ICs each

contain four latched drivers. A6801 ICs contain eight latched drivers.

A6800SA

A6800SL

The CMOS inputs are compatible with standard CMOS circuits. TTL

circuits may mandate the addition of input pull-up resistors. The bipolar

Darlington outputs are suitable for directly driving many peripheral/

power loads: relays, lamps, solenoids, small dc motors, etc.

All devices have open-collector outputs and integral diodes for induc-

tive load transient suppression. The output transistors are capable of

sinking 600 mA and will withstand at least 50 V in the OFF state.

Because of limitations on package power dissipation, the simultaneous

operation of all drivers at maximum rated current can only be accom-

plished by a reduction in duty cycle. Outputs may be paralleled for

higher load current capability.

A6801SA

A6801SEP

The A6800SA is furnished in a standard 14-pin DIP; the A6800SL and

A6801SLW in surface-mountable SOICs; the A6801SA in a 22-pin

DIP with 0.400” (10.16 mm) row centers; the A6801SEP in a 28-lead

PLCC. These devices are lead (Pb) free, with 100% matte tin plated

leadframes.

A6801SLW

ABSOLUTE MAXIMUM RATINGS

FEATURES

3.3 V to 5Vlogic supply range

CMOS, TTL compatible inputs

Output transient protection

Internal pull-down resistors

Low-power CMOS latches

Output Voltage, V_CE............................................50 V

Supply Voltage, V_DD.............................................7 V

Input Voltage Range,V_IN..............–0.3VtoV_DD+0.3V

Continuous Collector Current, I_C........................ 600 mA

Package Power Dissipation, P_D, see Allowable Power

Disspation chart, page 5

To 10 MHz data input rate

High-voltage, high-current outputs

Darlington current-sink outputs, with

improved low-saturation voltages

APPLICATIONS

Operating Temperature Range

Solenoids

Small dc motors

Relays

Lamps

Ambient Temperature, T_A............–20°C to +85°C

Storage Temperature, T_S..........–55°C to +150°C

Use the following complete part numbers when ordering:

Part Number

A6800SA-T

A6800SL-T

A6801SA-T

A6801SEP-T

A6801SLW-T

Pins

Package

DIP

Caution: CMOS devices have input-static protection,

but are susceptible to damage when exposed to

extremely high static-electrical charges.

SOIC

DIP

PLCC

SOIC

12 3 4 5 6 7...12

中文翻译

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与A6801SLW相关器件

型号	品牌	获取价格	描述	数据表
A6801SLW-T	ALLEGRO	获取价格	DABiC-5 Latched Sink Drivers
A6801SLWTR-T	ALLEGRO	获取价格	Latch Based Peripheral Driver, 1 Driver, BICMOS, PDSO24, LEAD FREE, MS-013AD, SOIC-24
A6802	PULSE	获取价格	GIGABIT DUAL TRANSFORMERS For Use with 150 W Twinax Cable
A6805	EPCOS	获取价格	AC Film Capacitors Lighting
A6809	ALLEGRO	获取价格	DABiC-IV, 10-BIT SERIAL-INPUT, LATCHED SOURCE DRIVERS
A6809ELW	ALLEGRO	获取价格	DABiC-IV, 10-BIT SERIAL-INPUT, LATCHED SOURCE DRIVERS
A6809ELWTR	ALLEGRO	获取价格	Vacuum Fluorescent Driver, 10-Segment, CMOS, PDSO18, SOIC-20
A6809SLW	ALLEGRO	获取价格	DABiC-IV, 10-BIT SERIAL-INPUT, LATCHED SOURCE DRIVERS
A6809SLWTR	ALLEGRO	获取价格	Vacuum Fluorescent Driver, 10-Segment, CMOS, PDSO18, SOIC-20
A680J15C0GF5UAA	VISHAY	获取价格	Ceramic Capacitor, Multilayer, Ceramic, 50V, 5% +Tol, 5% -Tol, C0G, 30ppm/Cel TC, 0.000068

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