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A1354KKTTN-T

更新时间： 2024-11-14 06:34:23
品牌 Logo 应用领域
急速微 - ALLEGRO 传感器换能器磁场传感器输出元件信息通信管理
页数 文件大小 规格书
22页 528K
描述
High Precision 2-Wire Linear Hall Effect Sensor IC with Pulse Width Modulated Output

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A1354KKTTN-T 技术参数

是否无铅： 不含铅是否Rohs认证： 符合
生命周期：Obsolete包装说明：SIP4,.03,50
Reach Compliance Code：unknown风险等级：5.84
Is Samacsys：N主体宽度：1 mm
主体高度：3.43 mm主体长度或直径：5.21 mm
外壳：PLASTICJESD-609代码：e3
安装特点：THROUGH HOLE MOUNT端子数量：4
最大工作电流：19 mA最高工作温度：125 °C
最低工作温度：-40 °C输出：SINGLE-ENDED
输出电路类型：SINGLE-ENDED输出接口类型：2-WIRE INTERFACE
输出类型：DIGITAL OUTPUT封装主体材料：PLASTIC/EPOXY
封装等效代码：SIP4,.03,50封装形状/形式：RECTANGULAR
电源：4.5/16 V传感器/换能器类型：MAGNETIC FIELD SENSOR,HALL EFFECT
子类别：Other Sensors最大供电电压：16 V
最小供电电压：4.5 V表面贴装：NO
技术：BICMOS端子面层：Matte Tin (Sn)
端接类型：SOLDERBase Number Matches：1

A1354KKTTN-T 数据手册

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A1354  
High Precision 2-Wire Linear Hall Effect Sensor IC  
with Pulse Width Modulated Output  
Features and Benefits  
Description  
▪ Designed for automotive, battery-powered applications  
▪ Customer programmable quiescent duty cycle, sensitivity,  
and PWM carrier frequency, through VCC pin  
▪ Simultaneous programming of duty cycle, sensitivity, and  
PWM carrier frequency, for system optimization  
▪ Factory programmed sensitivity temperature coefficient  
and quiescent duty cycle drift  
The A1354 device is a high precision, programmable 2-wire  
Hall effect linear sensor IC with a pulse width modulated  
(PWM) output. The duty cycle (D) of the PWM output signal  
is proportional to the applied magnetic field. The A1354  
device converts an analog signal from its internal Hall circuit  
to a digitally encoded PWM output signal. The coupled noise  
immunity of the digitally encoded PWM output is far superior  
to the noise immunity of an analog output signal.  
▪ Selectable unidirectional or bidirectional quiescent  
duty cycles  
TheBiCMOS,monolithiccircuitinsideoftheA1354integrates  
a Hall element, precision temperature-compensating circuitry  
to reduce the intrinsic sensitivity and offset drift of the Hall  
element, a small-signal high-gain amplifier, proprietary  
dynamic offset cancellation circuits, and PWM conversion  
circuitry. The dynamic offset cancellation circuits reduce  
the residual offset voltage of the Hall element. Hall element  
offset is normally caused by device overmolding, temperature  
dependencies, and thermal stress. The high frequency offset  
cancellation (chopping) clock allows a greater sampling rate,  
which increases the accuracy of the output signal and results  
in faster signal processing capability.  
▪ Pulse width modulated (PWM) output provides increased  
noise immunity compared to analog output  
▪ Temperature-stable quiescent duty cycle output and  
sensitivity  
Continued on the next page…  
Package: 4-pin SIP (suffix KT)  
1 mm case thickness  
The A1354 device is provided in a lead (Pb) free 4-pin single  
inline package (KT suffix), with 100% matte tin leadframe  
plating.  
Not to scale  
Functional Block Diagram  
VCC  
VCC  
PWM Carrier  
Regulator  
Generation  
and Trimming  
1
2
2
Switched  
Capacitor  
Control  
Programming  
Logic  
1
Signal  
Recovery  
Chopper  
Switches  
Amp  
Voltage  
Controlled  
Current  
Source  
Sensitivity  
and Sensitivity  
TC Trim  
% Duty  
Cycle  
Temperature  
Compensation  
Programming  
Interface  
% Duty Cycle  
Temperature  
Coefficient  
GND  
R
Sens  
A1354-DS, Rev. 1  
1234567...22

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