RESISTORSꢀCAPACITORSꢀCOILSꢀDELAY LINES
ACTIVE (DIGITAL) DELAY LINES
SINGLE, DUAL, TRIPLE, QUAD DELAYS
RCD
RCD
Term.W
is Pb-free
and RoHS
compliant
A04AG
100NS
A03AG
50NS
1
1
A0 SERIES
RoHS
Low cost solution for multiple timing delays in a single package!
ꢀ Economical cost, prompt delivery!
ꢀ Wide range of values, 5nS to 500nS
ꢀ TTL schottky interfaced
RCD’s digital delay lines have been designed to provide precise fixed delays with all
the necessary drive and pick-off circuitry. All inputs and outputs are schottky-type and
require no additional components to achieve specified delays. Designed to meet
the applicable environmental requirements of MIL-D-23859. Type A01 features a
single fixed delay, type A02 features two isolated delays, A03 features three delays,
and A04 features 4 delays (single delay SIP available). Application Guide available.
OPTIONS
ꢀ Opt.T= trailing edge design
ꢀ Opt. F =fast TTL, H =HCMOS, C =FACT
ꢀ Opt.A = auto-insertable design
ꢀ Opt.39 = -40 to +85°C operating temp.
ꢀ Tighter tolerances, faster rise times
ꢀ Low power design
PACKAGE STYLES
.500 [12.7] Max
.500 [12.7] Max
.40 [10.2]Max
5
8
ꢀ Military screening
↑
.015 [.4]
.285 [7.24]
.295 [7.5]
SIDE
SIDE VIEW
Max.
↓
.120 [3] Min
TOP VIEW
↓
.250
[6.35]
STANDARD DELAY TIMES
↑
1
→
.300 ±.01
[7.62±.25]
←.100 [2.54]
.300±.01
[7.6±.25]
4
←
→
.300 [7.6]
→
←
→ ←
.020 [.5]
5nS, 10nS, 15nS, 20nS. 25nS, 50nS,
75nS, 100nS, 250nS, 500nS
Intermediate values available on special order.
.420 [10.67]
→
←
.10 [2.54]
PACKAGE STYLE 8SM (8-Pin SM DIP)
PACKAGE STYLE 8P (8-Pin DIP)
.800 [20.3] Max
←
→
SPECIFICATIONS
← .800 [20.3] Max. →
.40 [10.2]Max
14
8
Operating Temp: 0 to 70°C
Delay Tol: ±2nS or ±5%, whichever greater
Rise Time: 4nS
↑
.285 [7.24]
.295 [7.5]
SIDE VIEW
TOP VIEW
Max.
↓
.120 [3] Min
.300
[7.6]
↓
1
7
↑
→
→
←.100 [2.54]
.300±.01
[7.6±.25]
←
→
.015 [.4]
.300 [7.6]
Peak Soldering Temp: +230°C
→
←
.600 ± .010
[15.2 ± .25]
→
.020 [.5]
←
←
.420 [10.67]
→
←
.10 [2.54]
PACKAGE STYLE 14P (14-Pin DIP)
PACKAGE STYLE 14SM (14-Pin SM DIP)
CHARACTERISTICS
RCD
Type
Independent Package
Circuit
Delays
Single
Single
Single
Style
CIRCUIT SCHEMATICS
A01
14P
A
B
A
B
C
D
C
D
E
F
A01S
A01AG
8P
Circuit D
Circuit A
Circuit B
Circuit C
14SM
8SM
14P
(VCC)
(OUT)
(VCC)
(OUT)
5
(VCC)
14
8
8
(OUT)
(OUT)
14
(VCC)
(OUT)
12
8
8
7(OUT)
5
A01SAG Single
A02A
Dual
Dual
Dual
DELAY
DELAY
DELAY
DELAY
DELAY DELAY
A02SA
A02AG
8P
14SM
8SM
14P
(GND)
(IN)
(GND)
(IN)
(IN)
4
(IN)
1
(IN)
5
(GND)
4
1
(IN)
1
1
7
3
(GND)
7
A02SAG Dual
A03
Triple
Triple
Triple
Circuit G
Circuit E
Circuit F
(VCC)
(OUT)
8 7
A03S
A03AG
8P
(Vcc)
9 (OUT) 8(OUT)
(VCC)
10 (OUT)
(OUT)
14
12(OUT)
(OUT)
(OUT)
12
14
10
8
(OUT)
(OUT)
5
6
14SM
8SM
14P
E
F
A03SAG Triple
DELAY DELAY
DELAY
DELAY DELAY DELAY
DELAY DELAY DELAY DELAY
A04
Quadruple
Quadruple
G
G
A04AG
14SM
(GND)
7
(IN)
5
(IN)
1
(IN)
(IN)
(IN)
3
3
(IN)
1
(GND)
4
2
(IN)
5
(GND)
7
(IN)
1
(IN)
4(IN)
3
P/N DESIGNATION:
TEST CONDITIONS @25°C
A01A
- 100nS - B W
1.) Input test pulse voltage: 3.2V
2.) Input pulse width: 50nS or 1.2x the total
delay (whichever is greater)
3.) Input rise time: 2.0nS (0.75V to 2.4V)
4.) Delay measured at 1.5V on leading edge
only with no loads on output (specify opt. T
for trailing edge design)
Type:A01,A01S,A01AG, etc.
Options: T, H, F, C,A, 39 (leave blank if std.)
Delay Time: 5nS, 10nS, etc
Packaging: B=Bulk (Magazine tube is standard)
Termination: W= Lead-free, Q= Tin/Lead
(leave blank if either is acceptable)
5.) Supply Voltage (Vcc): 5V
6.) Pulse spacing: 2x pulse width minimum
-
-
-
-
RCD Components Inc, 520 E.Industrial Park Dr, Manchester, NH, USA 03109 rcdcomponents.com Tel: 603 669 0054 Fax: 603 669 5455 Email:sales@rcdcomponents.com
FA077 Sale of this product is in accordance with GF-061. Specifications subject to change without notice.
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