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TM4SN64EPU-12A PDF预览

TM4SN64EPU-12A - TEXAS INSTRUMENTS

内存集成电路动态存储器时钟
型号:
TM4SN64EPU-12A
Datasheet下载:
下载Datasheet文件
产品描述:
SYNCHRONOUS DYNAMIC RAM MODULES
应用标签:
内存集成电路动态存储器时钟
文档页数/大小:
16页 / 273K
品牌Logo:
品牌名称:
TI [ TEXAS INSTRUMENTS ]

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TM4SN64EPU-12A

应用: 内存集成电路动态存储器时钟

文档: 16页 / 273K

品牌: TI

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生命周期
Obsolete
IHS 制造商
TEXAS INSTRUMENTS INC
零件包装代码
DIMM
包装说明
DIMM-168
针数
168
Reach Compliance Code
unknown
ECCN代码
EAR99
HTS代码
8542.32.00.24
风险等级
5.84
Is Samacsys
N
访问模式
DUAL BANK PAGE BURST
最长访问时间
9 ns
最大时钟频率 (fCLK)
83 MHz
I/O 类型
COMMON
JESD-30 代码
R-XDMA-N168
内存密度
268435456 bit
内存集成电路类型
SYNCHRONOUS DRAM MODULE
内存宽度
64
功能数量
1
端口数量
1
端子数量
168
字数
4194304 words
字数代码
4000000
工作模式
SYNCHRONOUS
最高工作温度
70 °C
最低工作温度
组织
4MX64
输出特性
3-STATE
封装主体材料
UNSPECIFIED
封装代码
DIMM
封装等效代码
DIMM168
封装形状
RECTANGULAR
封装形式
MICROELECTRONIC ASSEMBLY
电源
3.3 V
认证状态
Not Qualified
刷新周期
4096
座面最大高度
28.702 mm
最大待机电流
0.032 A
子类别
DRAMs
最大压摆率
1.256 mA
最大供电电压 (Vsup)
3.6 V
最小供电电压 (Vsup)
3 V
标称供电电压 (Vsup)
3.3 V
表面贴装
NO
技术
MOS
温度等级
COMMERCIAL
端子形式
NO LEAD
端子节距
1.27 mm
端子位置
DUAL
Base Number Matches
1
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TM2SN64EPU 2097152 BY 64-BIT
TM4SN64EPU 4194304 BY 64-BIT
SYNCHRONOUS DYNAMIC RAM MODULES
SMMS681 – AUGUST 1997
D
D
D
D
D
D
D
D
Organization:
– TM2SN64EPU . . . 2 097 152 x 64 Bits
– TM4SN64EPU . . . 4 194 304 x 64 Bits
Single 3.3-V Power Supply
(±10% Tolerance)
Designed for 66-MHz 4-Clock Systems
JEDEC 168-Pin Dual-In-Line Memory
Module (DIMM) Without Buffer for Use With
Socket
TM2SN64EPU — Uses Eight 16M-Bit
Synchronous Dynamic RAMs (SDRAMs)
(2M
×
8-Bit) in Plastic Thin Small-Outline
Packages (TSOPs)
TM4SN64EPU — Uses Sixteen 16M-Bit
SDRAMs (2M
×
8-Bit) in Plastic TSOPs
Byte-Read/Write Capability
Performance Ranges:
SYNCHRONOUS
CLOCK CYCLE
TIME
tCK3
tCK2
(CL = 3)
(CL = 2)
ACCESS TIME
CLOCK TO
OUTPUT
tCK3
tCK2
(CL = 3) (CL = 2)
9 ns
9 ns
9 ns
10 ns
REFRESH
INTERVAL
D
D
D
D
D
D
D
D
D
High-Speed, Low-Noise Low-Voltage TTL
(LVTTL) Interface
Read Latencies 2 and 3 Supported
Support Burst-Interleave and
Burst-Interrupt Operations
Burst Length Programmable to 1, 2, 4,
and 8
Two Banks for On-Chip Interleaving
(Gapless Access)
Ambient Temperature Range
0°C to 70°C
Gold-Plated Contacts
Pipeline Architecture
Serial Presence-Detect (SPD) Using
EEPROM
’xSN64EPU-12A
’xSN64EPU-12
12 ns
12 ns
15 ns
18 ns
64 ms
64 ms
† CL = CAS latency
‡ –12A speed device is supported only at –5 to +10% VDD
description
The TM2SN64EPU is a 16M-byte, 168-pin dual-in-line memory module (DIMM). The DIMM is composed of
eight TMS626812DGE, 2 097 152 x 8-bit SDRAMs, each in a 400-mil, 44-pin plastic thin small-outline package
(TSOP) mounted on a substrate with decoupling capacitors. See the TMS626812 data sheet (literature number
SMOS687).
The TM4SN64EPU is a 32M-byte, 168-pin DIMM. The DIMM is composed of sixteen TMS626812DGE,
2 097 152 x 8-bit SDRAMs, each in a 400-mil, 44-pin plastic TSOP mounted on a substrate with decoupling
capacitors. See the TMS626812 data sheet (literature number SMOS687).
operation
The TM2SN64EPU operates as eight TMS626812DGE devices that are connected as shown in the
TM2SN64EPU functional block diagram. The TM4SN64EPU operates as 16 TMS626812DGE devices
connected as shown in the TM4SN64EPU functional block diagram.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Copyright
©
1997, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
POST OFFICE BOX 1443
HOUSTON, TEXAS 77251–1443
1

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